tree 94c15fc38dc049880bae2d20907f14e3537066d8
parent b5c684b86340ac4502fd34d8b8554575669b174d
author Udi Jonnalagadda <udij@google.com> 1615831634 -0700
committer udinator <udij@google.com> 1615967012 -0700

[dv/sram] extend tl_errors_test to the SRAM

this PR adds a TLUL protocol error test to the SRAM memory interface,
and does so by extending the `cip_base_vseq__tl_errors.svh` to allow
the `tl_protocol_err()` task to take an input sequencer, allowing
protocol error tests to be run on any generic TLUL agent.

Only this task was updated in this way as all of the other error cases
are specific to CSR and uvm_mem interfaces, making them unfit to use on
the SRAM memory TLUL interface.

The `run_tl_errors_vseq()` task is extended by this test sequence to run
the custom TLUL protocol testcases, and is done so that it still remains
compatible with `stress_all_with_rand_reset` tests.

Signed-off-by: Udi Jonnalagadda <udij@google.com>