title: “List of Top-Level Designs”

This page lists all top-level designs and their targets that are contained within this repository. Click on the design name to get more information about the design.

DesignInternal NameSimulation TargetsFPGA TargetsASIC TargetsDescription
[Earl Grey]({{< relref “hw/top_earlgrey/doc” >}})top_earlgreyVerilatorNexys Video*None yet.0.1 release

A * behind an FPGA board indicates it can be used with a free EDA tool license.