)]}'
{
  "commit": "f9d2638905779ef04a9b36e0e69a8a568ffd3f38",
  "tree": "0d518aa3a5c2b1dcb734936c993d8be51e089dfc",
  "parents": [
    "9274b2851ab9e57be805d213002ec9b37109a8be"
  ],
  "author": {
    "name": "Udi Jonnalagadda",
    "email": "udij@google.com",
    "time": "Mon Jun 07 16:25:38 2021 -0700"
  },
  "committer": {
    "name": "udinator",
    "email": "udij@google.com",
    "time": "Fri Jun 11 09:56:42 2021 -0700"
  },
  "message": "[chip/dv] add SRAM chip-level tests\n\nThis PR adds the SRAM chip-level tests as per the previous testplan\nreview meeting.\n\nSigned-off-by: Udi Jonnalagadda \u003cudij@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "28718739478ce3d1549fd5cadf8dfed5eadcae75",
      "old_mode": 33188,
      "old_path": "hw/top_earlgrey/data/chip_testplan.hjson",
      "new_id": "cd9c30414d0ca40252437a91bf976a04b02df0a6",
      "new_mode": 33188,
      "new_path": "hw/top_earlgrey/data/chip_testplan.hjson"
    }
  ]
}