diff --git a/doc/ug/getting_started_verilator.md b/doc/ug/getting_started_verilator.md
index c5bde52..ce3915d 100644
--- a/doc/ug/getting_started_verilator.md
+++ b/doc/ug/getting_started_verilator.md
@@ -184,6 +184,6 @@
 
 ```console
 $ cd $REPO_TOP
-$ build/lowrisc_systems_top_earlgrey_verilator_0.1/sim-verilator/Vtop_earlgrey_verilator --meminit=sw/device/examples/hello_world/hello_world.vmem --trace
+$ build/lowrisc_systems_top_earlgrey_verilator_0.1/sim-verilator/Vtop_earlgrey_verilator --meminit=sw/device/examples/hello_world/sw.vmem --trace
 $ gtkwave sim.fst
 ```
diff --git a/doc/ug/quickstart.md b/doc/ug/quickstart.md
index 90cdacd..efdd3bf 100644
--- a/doc/ug/quickstart.md
+++ b/doc/ug/quickstart.md
@@ -13,8 +13,8 @@
 $ fusesoc --cores-root . run --target=sim --setup --build lowrisc:systems:top_earlgrey_verilator
 $ make SIM=1 -C sw/device/boot_rom clean all
 $ make SIM=1 -C sw/device/examples/hello_world clean all
-$ build/lowrisc_systems_top_earlgrey_verilator_0.1/sim-verilator/Vtop_earlgrey_verilator --rominit=sw/device/boot_rom/boot_rom.vmem \
-$ --flashinit=sw/device/examples/hello_world/hello_world.vmem
+$ build/lowrisc_systems_top_earlgrey_verilator_0.1/sim-verilator/Vtop_earlgrey_verilator --rominit=sw/device/boot_rom/rom.vmem \
+$ --flashinit=sw/device/examples/hello_world/sw.vmem
 ```
 
 See the [Getting Started with Verilator Guide](getting_started_verilator.md) for more information.