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opensecura / 3p / lowrisc / opentitan / ea0a2b366becbe4e66285d7b4b23e496e081f4de / . / hw / ip / prim / lint
tree: f67a152a58a50b3136de28d4d109802f450f6831 [path history] [tgz]
  1. prim.vlt
  2. prim.waiver
  3. prim_and2.waiver
  4. prim_arbiter.vlt
  5. prim_arbiter.waiver
  6. prim_assert.vlt
  7. prim_assert.waiver
  8. prim_buf.waiver
  9. prim_cdc_rand_delay.vlt
  10. prim_cdc_rand_delay.waiver
  11. prim_cipher.vlt
  12. prim_cipher_pkg.waiver
  13. prim_clock_buf.waiver
  14. prim_clock_div.waiver
  15. prim_clock_gating.waiver
  16. prim_clock_inv.waiver
  17. prim_clock_mux2.waiver
  18. prim_count.vlt
  19. prim_count.waiver
  20. prim_crc32.vlt
  21. prim_double_lfsr.vlt
  22. prim_double_lfsr.waiver
  23. prim_fifo.vlt
  24. prim_fifo.waiver
  25. prim_flash.waiver
  26. prim_flop.waiver
  27. prim_flop_2sync.waiver
  28. prim_flop_en.waiver
  29. prim_lc_sender.waiver
  30. prim_lfsr.waiver
  31. prim_max_tree.vlt
  32. prim_max_tree.waiver
  33. prim_mubi.waiver
  34. prim_onehot_check.vlt
  35. prim_onehot_check.waiver
  36. prim_onehot_mux.waiver
  37. prim_otp.waiver
  38. prim_pad_attr.waiver
  39. prim_pad_wrapper.waiver
  40. prim_ram_1p.waiver
  41. prim_ram_1p_adv.waiver
  42. prim_ram_1p_scr.vlt
  43. prim_ram_2p.waiver
  44. prim_reg_we_check.waiver
  45. prim_rom.waiver
  46. prim_rst_sync.waiver
  47. prim_secded.waiver
  48. prim_sparse_fsm_flop.vlt
  49. prim_sparse_fsm_flop.waiver
  50. prim_subreg.vlt
  51. prim_subreg.waiver
  52. prim_sum_tree.vlt
  53. prim_sum_tree.waiver
  54. prim_usb_diff_rx.waiver
  55. prim_xnor2.waiver
  56. prim_xor2.waiver
  57. prim_xoshiro256pp.vlt