tree bde1b31fefd72285f0784b781f3ed931a1475b6f
parent ae4b39564d092ed0393bab561f2b77441735244e
author Rupert Swarbrick <rswarbrick@lowrisc.org> 1627900368 +0100
committer Rupert Swarbrick <rswarbrick@gmail.com> 1628088472 +0100

[otbn,dv] Properly handle operands that are both src and dst in RIG

The existing code was only correct if no operand is both a source and
a destination... which isn't true any more! In particular, we could
generate BN.MULQACC instructions that wrote to constant registers.

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>