hw/vendor/pulp_riscv_dbg/tb/.gitignore

TAGS
memory_dump.bin
modelsim.ini
*.o
work/*
*.vstf
*.wlf
*.log
objdump
.build-rtl
.lib-rtl
.opt-rtl
*.elf
*.hex
riscv
common_cells
tech_cells_generic
fpnew
transcript
.nfs*
simv*
ucli.key
DVEfiles
cobj_dir
obj_dir
testbench_verilator