tree e5940fe296f058ee58289138b00003f03b664c02
parent 2c9ad7c88bc2b611b16a09a4ce002758c1f7113a
author Michael Schaffner <msf@opentitan.org> 1611878077 -0800
committer Michael Schaffner <msf@google.com> 1612495282 -0800

[util/design] Add OTP preload image generator script

This adds an OTP preload image generator script that builds on top of
the already existing OTP memory map and LC state generation scripts and
classes.

It basically reads an OTP image configuration that defines the values of
specific OTP memory map items. Together with the memory map and life
cycle definition Hjson files, these values are then transformed into a
memory hexfile suitable for preloading simulation and FPGA emulation
runs. If needed, this script also scrambles the partitions and
calculates partition digests.

The generated hexfile is compatible with the Verilog $readmemh
function.

Signed-off-by: Michael Schaffner <msf@opentitan.org>