diff --git a/hw/ip/hmac/rtl/hmac.sv b/hw/ip/hmac/rtl/hmac.sv
index 043829d..a0b73ab 100644
--- a/hw/ip/hmac/rtl/hmac.sv
+++ b/hw/ip/hmac/rtl/hmac.sv
@@ -259,7 +259,7 @@
 
   prim_fifo_sync #(
     .Width   ($bits(sha_fifo_t)),
-    .Pass    (1'b0),
+    .Pass    (1'b1),
     .Depth   (MsgFifoDepth)
   ) u_msg_fifo (
     .clk_i,
diff --git a/hw/ip/hmac/rtl/sha2_pad.sv b/hw/ip/hmac/rtl/sha2_pad.sv
index 5ee9088..cc56535 100644
--- a/hw/ip/hmac/rtl/sha2_pad.sv
+++ b/hw/ip/hmac/rtl/sha2_pad.sv
@@ -309,8 +309,4 @@
   // State machine is in Idle only when it meets tx_count == message length
   assign msg_feed_complete = hash_process_flag && (st_q == StIdle);
 
-  // When fifo_partial, fifo shouldn't be empty and hash_process was set
-  `ASSERT(ValidPartialConditionAssert,
-          fifo_partial && fifo_rvalid |-> hash_process_flag)
-
 endmodule