tree 4a9c74214960653c9569e39a6f6e5d26c2b93cff
parent ff9b7f86c5c59a6935ec478f06010ba9c56a398e
author Philipp Wagner <phw@lowrisc.org> 1599677261 +0100
committer Philipp Wagner <mail@philipp-wagner.com> 1601992607 +0100

[test] Add system tests running on a Nexys Video board

Run a basic set of sanity tests on FPGA: flash the FPGA with the
bitstream, load software over SPI with the spiflash tool, connect to the
UART device, and check if the software does what it should do.

For this first PR we run all self-checking software tests, as we do on
the Verilator simulation target (minus the usbdev one, which isn't
supported on FPGA, as it needs the USBDPI module).

To run the FPGA tests only, run

```
pytest -sv --log-cli-level=DEBUG test/systemtest/earlgrey/test_fpga_nexysvideo.py
```

Signed-off-by: Philipp Wagner <phw@lowrisc.org>