)]}'
{
  "commit": "98aaf5caa356a84e3db61bb2d5de60a977b5b99f",
  "tree": "fe92fd78316a77b12726b0b2709a86eb779b0811",
  "parents": [
    "cbe384f933eba31939fc62f4585a829bf42be308"
  ],
  "author": {
    "name": "Rupert Swarbrick",
    "email": "rswarbrick@lowrisc.org",
    "time": "Thu Jan 21 12:55:11 2021 +0000"
  },
  "committer": {
    "name": "Rupert Swarbrick",
    "email": "rswarbrick@gmail.com",
    "time": "Sun Jan 24 21:19:37 2021 +0000"
  },
  "message": "[otbn] Add support for \"const values\" to RIG\n\nThis is going to be important for generating loop bodies. The trick is\nthat we want to say something like \"don\u0027t touch x3, x4 or x10 in the\nloop body\" to make sure that they still have the same values each\niteration. This way, they can be used as base addresses for memory\naccesses or jumps, without having to worry that they\u0027ll get trashed on\nthe following iteration.\n\nThis also adds support for \"forgetting values\" in the model. We\u0027ll\ngenerate a loop body by iterating over all known registers and either\nmarking them const or forgetting their exact values. This guarantees\nthat we don\u0027t use a trashable register as a base address.\n\nSigned-off-by: Rupert Swarbrick \u003crswarbrick@lowrisc.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b6dc72134cdca2b1c268b69111729d5e85618ab1",
      "old_mode": 33188,
      "old_path": "hw/ip/otbn/util/rig/gens/straight_line_insn.py",
      "new_id": "4b20d1fc3dae1c4fff8041499688abc760ec0c3a",
      "new_mode": 33188,
      "new_path": "hw/ip/otbn/util/rig/gens/straight_line_insn.py"
    },
    {
      "type": "modify",
      "old_id": "ffbc634c80f988d8baabd778d287a11c5f0a0a8a",
      "old_mode": 33188,
      "old_path": "hw/ip/otbn/util/rig/model.py",
      "new_id": "f476a062d4c12820d9e682a174bc123951604eda",
      "new_mode": 33188,
      "new_path": "hw/ip/otbn/util/rig/model.py"
    }
  ]
}