)]}'
{
  "commit": "95e2b8c74af762e7d05dca070bbd9afc3c092d9a",
  "tree": "5093947a6182c545fa95bef2980ec28b708d1103",
  "parents": [
    "9bfdaabbfc4bc6fe8822f9bd8921f988accd6d9f"
  ],
  "author": {
    "name": "Srikrishna Iyer",
    "email": "sriyer@google.com",
    "time": "Thu Aug 26 00:12:39 2021 -0700"
  },
  "committer": {
    "name": "Srikrishna Iyer",
    "email": "46467186+sriyerg@users.noreply.github.com",
    "time": "Fri Aug 27 10:45:18 2021 -0700"
  },
  "message": "[chip dv] Fix failing SVA in pwrmgr_ast_sva_if\n\nThis is a possible fix for #7942. Instead of tracking levels, this\nchange tracks edges instead, and reduces the lower clock cycle bound to\n0.\n\nSigned-off-by: Srikrishna Iyer \u003csriyer@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ebe725933602b0de1678e2684983d8f6af24384e",
      "old_mode": 33188,
      "old_path": "hw/ip/pwrmgr/dv/sva/pwrmgr_ast_sva_if.sv",
      "new_id": "cc332c861b1257dfe29fb0e94634c6b5b0db351e",
      "new_mode": 33188,
      "new_path": "hw/ip/pwrmgr/dv/sva/pwrmgr_ast_sva_if.sv"
    }
  ]
}