)]}'
{
  "commit": "90b6c2bd97717bd8bf5f5276ebec49f6b10ecbf6",
  "tree": "66cb3309615ca75c8c4c4e3fea45b9786de5b83e",
  "parents": [
    "67e30fa0ab0601f5ea75f3795e0df37996597c47"
  ],
  "author": {
    "name": "Pirmin Vogel",
    "email": "vogelpi@lowrisc.org",
    "time": "Tue Oct 06 17:50:23 2020 +0200"
  },
  "committer": {
    "name": "Pirmin Vogel",
    "email": "vogelpi@lowrisc.org",
    "time": "Wed Oct 07 15:50:42 2020 +0200"
  },
  "message": "[fpga] Route UART Tx to second pin on ChipWhisperer board for debugging\n\nOn the ChipWhisperer FPGA board, the UART is connected to the capture\nboard and used for transfering input and output data. This commit adds a\nsecond UART Tx pin to allow debugging before capturing traces.\n\nSigned-off-by: Pirmin Vogel \u003cvogelpi@lowrisc.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "854f9019717dc0df77be81fdbab2758b66caf7c3",
      "old_mode": 33188,
      "old_path": "hw/top_earlgrey/data/pins_cw305.xdc",
      "new_id": "9b35469192d4c393b7bcb58393c1380028b462de",
      "new_mode": 33188,
      "new_path": "hw/top_earlgrey/data/pins_cw305.xdc"
    },
    {
      "type": "modify",
      "old_id": "561313f63a35e3cd519f7cddb09753f2c9adbd56",
      "old_mode": 33188,
      "old_path": "hw/top_earlgrey/rtl/top_earlgrey_cw305.sv",
      "new_id": "873b054073440bca5edcb3e78daecb53432205ec",
      "new_mode": 33188,
      "new_path": "hw/top_earlgrey/rtl/top_earlgrey_cw305.sv"
    }
  ]
}