diff --git a/hw/ip/prim/lint/prim_sparse_fsm_flop.vlt b/hw/ip/prim/lint/prim_sparse_fsm_flop.vlt
index f48a4ab..ca198d7 100644
--- a/hw/ip/prim/lint/prim_sparse_fsm_flop.vlt
+++ b/hw/ip/prim/lint/prim_sparse_fsm_flop.vlt
@@ -5,4 +5,4 @@
 `verilator_config
 
 // This parameter is only used in DV/FPV.
-lint_off -rule UNUSED -file "*/rtl/prim_sparse_fsm_flop.sv" -match "*DisableAlertTriggerSVA*"
+lint_off -rule UNUSED -file "*/rtl/prim_sparse_fsm_flop.sv" -match "*EnableAlertTriggerSVA*"
diff --git a/hw/ip/prim/lint/prim_sparse_fsm_flop.waiver b/hw/ip/prim/lint/prim_sparse_fsm_flop.waiver
index 66abff8..e3e2d88 100644
--- a/hw/ip/prim/lint/prim_sparse_fsm_flop.waiver
+++ b/hw/ip/prim/lint/prim_sparse_fsm_flop.waiver
@@ -10,5 +10,5 @@
 waive -rules {PARAM_NOT_USED} -location {prim_sparse_fsm_flop.sv} -regexp {.*StateEnumT.*} \
       -comment "The state enum is used only during DV / FPV."
 
-waive -rules {PARAM_NOT_USED} -location {prim_sparse_fsm_flop.sv} -regexp {.*DisableAlertTriggerSVA.*} \
+waive -rules {PARAM_NOT_USED} -location {prim_sparse_fsm_flop.sv} -regexp {.*EnableAlertTriggerSVA.*} \
       -comment "The disable parameter is used only during DV / FPV."
\ No newline at end of file
diff --git a/hw/ip_templates/alert_handler/alert_handler_component.core b/hw/ip_templates/alert_handler/alert_handler_component.core
index 5023d38..6965391 100644
--- a/hw/ip_templates/alert_handler/alert_handler_component.core
+++ b/hw/ip_templates/alert_handler/alert_handler_component.core
@@ -15,6 +15,7 @@
       - lowrisc:prim:edn_req
       - lowrisc:prim:buf
       - lowrisc:prim:mubi
+      - lowrisc:prim:sparse_fsm
       - lowrisc:ip_interfaces:alert_handler_reg
     files:
       - rtl/alert_pkg.sv
diff --git a/hw/ip_templates/alert_handler/rtl/alert_handler_esc_timer.sv b/hw/ip_templates/alert_handler/rtl/alert_handler_esc_timer.sv
index cb7a51b..83cd101 100644
--- a/hw/ip_templates/alert_handler/rtl/alert_handler_esc_timer.sv
+++ b/hw/ip_templates/alert_handler/rtl/alert_handler_esc_timer.sv
@@ -114,28 +114,28 @@
   //  2: --
   //  3: --
   //  4: --
-  //  5: |||||||||||||||||||| (42.86%)
-  //  6: |||||||||||||||||||| (42.86%)
-  //  7: |||||| (14.29%)
+  //  5: |||||||||||||||||||| (46.43%)
+  //  6: |||||||||||||||||||| (46.43%)
+  //  7: ||| (7.14%)
   //  8: --
   //  9: --
   // 10: --
   //
   // Minimum Hamming distance: 5
   // Maximum Hamming distance: 7
-  // Minimum Hamming weight: 2
-  // Maximum Hamming weight: 7
+  // Minimum Hamming weight: 3
+  // Maximum Hamming weight: 9
   //
   localparam int StateWidth = 10;
   typedef enum logic [StateWidth-1:0] {
-    IdleSt     = 10'b1101000111,
-    TimeoutSt  = 10'b0010011110,
-    Phase0St   = 10'b1111011001,
-    Phase1St   = 10'b0001110100,
-    Phase2St   = 10'b1110110010,
-    Phase3St   = 10'b0010000001,
-    TerminalSt = 10'b0101101010,
-    FsmErrorSt = 10'b1000101101
+    IdleSt     = 10'b1011011010,
+    TimeoutSt  = 10'b0000100110,
+    Phase0St   = 10'b1110000101,
+    Phase1St   = 10'b0101010100,
+    Phase2St   = 10'b0000011001,
+    Phase3St   = 10'b1001100001,
+    TerminalSt = 10'b1101111111,
+    FsmErrorSt = 10'b0111101000
   } state_e;
 
   logic fsm_error;
@@ -310,14 +310,18 @@
   // flops in order to prevent FSM state encoding optimizations.
   logic [StateWidth-1:0] state_raw_q;
   assign state_q = state_e'(state_raw_q);
-  prim_flop #(
+  prim_sparse_fsm_flop #(
+    .StateEnumT(state_e),
     .Width(StateWidth),
-    .ResetValue(StateWidth'(IdleSt))
+    .ResetValue(StateWidth'(IdleSt)),
+    // The alert handler behaves differently than other comportable IP. I.e., instead of sending out
+    // an alert signal, this condition is handled internally in the alert handler.
+    .EnableAlertTriggerSVA(0)
   ) u_state_regs (
     .clk_i,
     .rst_ni,
-    .d_i ( state_d     ),
-    .q_o ( state_raw_q )
+    .state_i ( state_d     ),
+    .state_o ( state_raw_q )
   );
 
   ////////////////
diff --git a/hw/ip_templates/alert_handler/rtl/alert_handler_ping_timer.sv b/hw/ip_templates/alert_handler/rtl/alert_handler_ping_timer.sv
index 8f06919..e515f97 100644
--- a/hw/ip_templates/alert_handler/rtl/alert_handler_ping_timer.sv
+++ b/hw/ip_templates/alert_handler/rtl/alert_handler_ping_timer.sv
@@ -263,12 +263,12 @@
   //
   localparam int StateWidth = 9;
   typedef enum logic [StateWidth-1:0] {
-    InitSt      = 9'b000101100,
-    AlertWaitSt = 9'b011001011,
-    AlertPingSt = 9'b110000000,
-    EscWaitSt   = 9'b101110001,
-    EscPingSt   = 9'b011110110,
-    FsmErrorSt  = 9'b100011111
+    InitSt      = 9'b011001011,
+    AlertWaitSt = 9'b110000000,
+    AlertPingSt = 9'b101110001,
+    EscWaitSt   = 9'b010110110,
+    EscPingSt   = 9'b000011101,
+    FsmErrorSt  = 9'b101101110
   } state_e;
 
   state_e state_d, state_q;
@@ -365,15 +365,18 @@
   // flops in order to prevent FSM state encoding optimizations.
   logic [StateWidth-1:0] state_raw_q;
   assign state_q = state_e'(state_raw_q);
-
-  prim_flop #(
+  prim_sparse_fsm_flop #(
+    .StateEnumT(state_e),
     .Width(StateWidth),
-    .ResetValue(StateWidth'(InitSt))
+    .ResetValue(StateWidth'(InitSt)),
+    // The alert handler behaves differently than other comportable IP. I.e., instead of sending out
+    // an alert signal, this condition is handled internally in the alert handler.
+    .EnableAlertTriggerSVA(0)
   ) u_state_regs (
     .clk_i,
     .rst_ni,
-    .d_i ( state_d     ),
-    .q_o ( state_raw_q )
+    .state_i ( state_d     ),
+    .state_o ( state_raw_q )
   );
 
   ////////////////
diff --git a/hw/top_earlgrey/ip_autogen/alert_handler/alert_handler_component.core b/hw/top_earlgrey/ip_autogen/alert_handler/alert_handler_component.core
index 5023d38..6965391 100644
--- a/hw/top_earlgrey/ip_autogen/alert_handler/alert_handler_component.core
+++ b/hw/top_earlgrey/ip_autogen/alert_handler/alert_handler_component.core
@@ -15,6 +15,7 @@
       - lowrisc:prim:edn_req
       - lowrisc:prim:buf
       - lowrisc:prim:mubi
+      - lowrisc:prim:sparse_fsm
       - lowrisc:ip_interfaces:alert_handler_reg
     files:
       - rtl/alert_pkg.sv
diff --git a/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_esc_timer.sv b/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_esc_timer.sv
index cb7a51b..83cd101 100644
--- a/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_esc_timer.sv
+++ b/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_esc_timer.sv
@@ -114,28 +114,28 @@
   //  2: --
   //  3: --
   //  4: --
-  //  5: |||||||||||||||||||| (42.86%)
-  //  6: |||||||||||||||||||| (42.86%)
-  //  7: |||||| (14.29%)
+  //  5: |||||||||||||||||||| (46.43%)
+  //  6: |||||||||||||||||||| (46.43%)
+  //  7: ||| (7.14%)
   //  8: --
   //  9: --
   // 10: --
   //
   // Minimum Hamming distance: 5
   // Maximum Hamming distance: 7
-  // Minimum Hamming weight: 2
-  // Maximum Hamming weight: 7
+  // Minimum Hamming weight: 3
+  // Maximum Hamming weight: 9
   //
   localparam int StateWidth = 10;
   typedef enum logic [StateWidth-1:0] {
-    IdleSt     = 10'b1101000111,
-    TimeoutSt  = 10'b0010011110,
-    Phase0St   = 10'b1111011001,
-    Phase1St   = 10'b0001110100,
-    Phase2St   = 10'b1110110010,
-    Phase3St   = 10'b0010000001,
-    TerminalSt = 10'b0101101010,
-    FsmErrorSt = 10'b1000101101
+    IdleSt     = 10'b1011011010,
+    TimeoutSt  = 10'b0000100110,
+    Phase0St   = 10'b1110000101,
+    Phase1St   = 10'b0101010100,
+    Phase2St   = 10'b0000011001,
+    Phase3St   = 10'b1001100001,
+    TerminalSt = 10'b1101111111,
+    FsmErrorSt = 10'b0111101000
   } state_e;
 
   logic fsm_error;
@@ -310,14 +310,18 @@
   // flops in order to prevent FSM state encoding optimizations.
   logic [StateWidth-1:0] state_raw_q;
   assign state_q = state_e'(state_raw_q);
-  prim_flop #(
+  prim_sparse_fsm_flop #(
+    .StateEnumT(state_e),
     .Width(StateWidth),
-    .ResetValue(StateWidth'(IdleSt))
+    .ResetValue(StateWidth'(IdleSt)),
+    // The alert handler behaves differently than other comportable IP. I.e., instead of sending out
+    // an alert signal, this condition is handled internally in the alert handler.
+    .EnableAlertTriggerSVA(0)
   ) u_state_regs (
     .clk_i,
     .rst_ni,
-    .d_i ( state_d     ),
-    .q_o ( state_raw_q )
+    .state_i ( state_d     ),
+    .state_o ( state_raw_q )
   );
 
   ////////////////
diff --git a/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_ping_timer.sv b/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_ping_timer.sv
index 8f06919..e515f97 100644
--- a/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_ping_timer.sv
+++ b/hw/top_earlgrey/ip_autogen/alert_handler/rtl/alert_handler_ping_timer.sv
@@ -263,12 +263,12 @@
   //
   localparam int StateWidth = 9;
   typedef enum logic [StateWidth-1:0] {
-    InitSt      = 9'b000101100,
-    AlertWaitSt = 9'b011001011,
-    AlertPingSt = 9'b110000000,
-    EscWaitSt   = 9'b101110001,
-    EscPingSt   = 9'b011110110,
-    FsmErrorSt  = 9'b100011111
+    InitSt      = 9'b011001011,
+    AlertWaitSt = 9'b110000000,
+    AlertPingSt = 9'b101110001,
+    EscWaitSt   = 9'b010110110,
+    EscPingSt   = 9'b000011101,
+    FsmErrorSt  = 9'b101101110
   } state_e;
 
   state_e state_d, state_q;
@@ -365,15 +365,18 @@
   // flops in order to prevent FSM state encoding optimizations.
   logic [StateWidth-1:0] state_raw_q;
   assign state_q = state_e'(state_raw_q);
-
-  prim_flop #(
+  prim_sparse_fsm_flop #(
+    .StateEnumT(state_e),
     .Width(StateWidth),
-    .ResetValue(StateWidth'(InitSt))
+    .ResetValue(StateWidth'(InitSt)),
+    // The alert handler behaves differently than other comportable IP. I.e., instead of sending out
+    // an alert signal, this condition is handled internally in the alert handler.
+    .EnableAlertTriggerSVA(0)
   ) u_state_regs (
     .clk_i,
     .rst_ni,
-    .d_i ( state_d     ),
-    .q_o ( state_raw_q )
+    .state_i ( state_d     ),
+    .state_o ( state_raw_q )
   );
 
   ////////////////