title: “On-Device Test Framework”

Chip-level Test Infrastructure

Currently, chip-level tests are executed across three targets (DV, Verilator, and FPGA), using host-side test initiation tools, and an on-device test framework, as shown in the figure above. On the host side, two main tools are used to initiate tests on the device. For the DV simulation target, the dvsim.py tool is used, while for Verilator and FPGA targets, the systemtest (pytest) tool is used. Focusing on the device side, for all three targets, the on-device test framework is used to provide a uniform execution environment for chip-level tests. The on-device test framework provides boilerplate setup code that configures the UART for communicating messages and test results back to the host. To write a chip-level test that uses this framework, one must create a new C file for the test with the following boilerplate code:

#include "sw/device/lib/testing/test_framework/test_main.h"
#include "sw/device/lib/testing/check_.h" // if calls to CHECK() are made
#include "sw/device/lib/runtime/log.h"  // if calls to LOG_INFO() are made

const test_config_t kTestConfig;

bool test_main() {
  // Test program entry point.
  return true;
}

Check out the rv_timer smoke test for an example chip-level test that uses the current test framework.