diff --git a/sw/host/vendor/mpsse.lock.hjson b/sw/host/vendor/mpsse.lock.hjson
new file mode 100644
index 0000000..409d0a0
--- /dev/null
+++ b/sw/host/vendor/mpsse.lock.hjson
@@ -0,0 +1,15 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This file is generated by the vendor_hw script. Please do not modify it
+// manually.
+
+{
+  upstream:
+  {
+    url: https://chromium.googlesource.com/chromiumos/platform2/
+    rev: e729a61489259d1bf34e6df7f8e284febf02da2e
+    only_subdir: trunks/ftdi
+  }
+}
diff --git a/sw/host/vendor/mpsse.vendor.hjson b/sw/host/vendor/mpsse.vendor.hjson
new file mode 100644
index 0000000..2f41456
--- /dev/null
+++ b/sw/host/vendor/mpsse.vendor.hjson
@@ -0,0 +1,15 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  name: "mpsse",
+  target_dir: "mpsse",
+  patch_dir: "patches/mpsse",
+
+
+  upstream: {
+    url: "https://chromium.googlesource.com/chromiumos/platform2/",
+    rev: "master",
+    only_subdir: "trunks/ftdi",
+  },
+}
diff --git a/sw/host/vendor/mpsse/mpsse.c b/sw/host/vendor/mpsse/mpsse.c
index 308fa50..0d6f12c 100644
--- a/sw/host/vendor/mpsse/mpsse.c
+++ b/sw/host/vendor/mpsse/mpsse.c
@@ -1,5 +1,4 @@
 /*
- *
  *Copyright (C) 2015 The Android Open Source Project
  *
  *Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,7 +13,6 @@
  *See the License for the specific language governing permissions and
  *limitations under the License.
  *
- *
  * This file was copied from https://github.com/devttys0/libmpsse.git (sha1
  * f1a6744b), and modified to suite the Chromium OS project.
  *
@@ -23,17 +21,20 @@
  * Craig Heffner
  * 27 December 2011
  */
-#include "support.h"
 
 #include <stdlib.h>
 #include <string.h>
 #include <stdint.h>
 #include <unistd.h>
+
+#include "support.h"
+
 /* List of known FT2232-based devices */
 struct vid_pid supported_devices[] = {
     {0x0403, 0x6010, "FT2232 Future Technology Devices International, Ltd"},
     {0x0403, 0x6011, "FT4232 Future Technology Devices International, Ltd"},
     {0x0403, 0x6014, "FT232H Future Technology Devices International, Ltd"},
+
     /* These devices are based on FT2232 chips, but have not been tested. */
     {0x0403, 0x8878, "Bus Blaster v2 (channel A)"},
     {0x0403, 0x8879, "Bus Blaster v2 (channel B)"},
@@ -42,7 +43,9 @@
     {0x0403, 0x8A98, "TIAO Multi Protocol Adapter"},
     {0x15BA, 0x0003, "Olimex Ltd. OpenOCD JTAG"},
     {0x15BA, 0x0004, "Olimex Ltd. OpenOCD JTAG TINY"},
+
     {0, 0, NULL}};
+
 /*
  * Opens and initializes the first FTDI device found.
  *
@@ -55,16 +58,19 @@
 struct mpsse_context* MPSSE(enum modes mode, int freq, int endianess) {
   int i = 0;
   struct mpsse_context* mpsse = NULL;
+
   for (i = 0; supported_devices[i].vid != 0; i++) {
-    mpsse = Open(supported_devices[i].vid, supported_devices[i].pid, mode,
-                 freq, endianess, IFACE_A, NULL, NULL);
+    mpsse = Open(supported_devices[i].vid, supported_devices[i].pid, mode, freq,
+                 endianess, IFACE_A, NULL, NULL);
     if (mpsse) {
       mpsse->description = supported_devices[i].description;
       return mpsse;
     }
   }
+
   return NULL;
 }
+
 /*
  * Open device by VID/PID
  *
@@ -90,6 +96,7 @@
   return OpenIndex(vid, pid, mode, freq, endianess, interface, description,
                    serial, 0);
 }
+
 /*
  * Open device by VID/PID/index
  *
@@ -118,19 +125,25 @@
                                 int index) {
   int status = 0;
   struct mpsse_context* mpsse = NULL;
-  mpsse = (struct mpsse_context*)malloc(sizeof(struct mpsse_context));
+
+  mpsse = malloc(sizeof(struct mpsse_context));
   if (!mpsse)
     return NULL;
+
   memset(mpsse, 0, sizeof(struct mpsse_context));
+
   /* Legacy; flushing is no longer needed, so disable it by default. */
   FlushAfterRead(mpsse, 0);
+
   /* ftdilib initialization */
   if (ftdi_init(&mpsse->ftdi)) {
     free(mpsse);
     return NULL;
   }
+
   /* Set the FTDI interface  */
   ftdi_set_interface(&mpsse->ftdi, interface);
+
   /* Open the specified device */
   if (!ftdi_usb_open_desc_index(&mpsse->ftdi, vid, pid, description, serial,
                                 index)) {
@@ -139,26 +152,33 @@
     mpsse->pid = pid;
     mpsse->status = STOPPED;
     mpsse->endianess = endianess;
+
     /* Set the appropriate transfer size for the requested protocol */
     if (mpsse->mode == I2C)
       mpsse->xsize = I2C_TRANSFER_SIZE;
     else
       mpsse->xsize = SPI_RW_SIZE;
+
     status |= ftdi_usb_reset(&mpsse->ftdi);
     status |= ftdi_set_latency_timer(&mpsse->ftdi, LATENCY_MS);
     status |= ftdi_write_data_set_chunksize(&mpsse->ftdi, CHUNK_SIZE);
     status |= ftdi_read_data_set_chunksize(&mpsse->ftdi, CHUNK_SIZE);
     status |= ftdi_set_bitmode(&mpsse->ftdi, 0, BITMODE_RESET);
+
     if (status == 0) {
       /* Set the read and write timeout periods */
       set_timeouts(mpsse, USB_TIMEOUT);
+
       if (mpsse->mode != BITBANG) {
         ftdi_set_bitmode(&mpsse->ftdi, 0, BITMODE_MPSSE);
+
         if (SetClock(mpsse, freq) == MPSSE_OK) {
           if (SetMode(mpsse, endianess) == MPSSE_OK) {
             mpsse->opened = 1;
+
             /* Give the chip a few mS to initialize */
             usleep(SETUP_DELAY);
+
             /*
              * Not all FTDI chips support all the commands that SetMode may
              * have sent.
@@ -176,12 +196,15 @@
       }
     }
   }
+
   if (mpsse && !mpsse->opened) {
     Close(mpsse);
     mpsse = NULL;
   }
+
   return mpsse;
 }
+
 /*
  * Closes the device, deinitializes libftdi, and frees the MPSSE context
  *pointer.
@@ -193,6 +216,7 @@
 void Close(struct mpsse_context* mpsse) {
   if (!mpsse)
     return;
+
   if (mpsse->opened) {
     /* Shut these down only if initialization succeeded before. */
     ftdi_set_bitmode(&mpsse->ftdi, 0, BITMODE_RESET);
@@ -201,6 +225,7 @@
   ftdi_deinit(&mpsse->ftdi);
   free(mpsse);
 }
+
 /* Enables bit-wise data transfers.
  * Must be called after MPSSE() / Open() / OpenIndex().
  *
@@ -219,6 +244,7 @@
     }
   }
 }
+
 /*
  * Sets the appropriate transmit and receive commands based on the requested
  *mode and byte order.
@@ -233,6 +259,7 @@
   int retval = MPSSE_OK, i = 0, setup_commands_size = 0;
   uint8_t buf[CMD_SIZE] = {0};
   uint8_t setup_commands[CMD_SIZE * MAX_SETUP_COMMANDS] = {0};
+
   /* Do not call is_valid_context() here, as the FTDI chip may not be completely
    * configured when SetMode is called */
   if (mpsse) {
@@ -240,18 +267,25 @@
     mpsse->tx = MPSSE_DO_WRITE | endianess;
     mpsse->rx = MPSSE_DO_READ | endianess;
     mpsse->txrx = MPSSE_DO_WRITE | MPSSE_DO_READ | endianess;
+
     /* Clock, data out, chip select pins are outputs; all others are inputs. */
     mpsse->tris = DEFAULT_TRIS;
+
     /* Clock and chip select pins idle high; all others are low */
     mpsse->pidle = mpsse->pstart = mpsse->pstop = DEFAULT_PORT;
+
     /* During reads and writes the chip select pin is brought low */
     mpsse->pstart &= ~CS;
+
     /* Disable FTDI internal loopback */
     SetLoopback(mpsse, 0);
+
     /* Send ACKs by default */
     SetAck(mpsse, ACK);
+
     /* Ensure adaptive clock is disabled */
     setup_commands[setup_commands_size++] = DISABLE_ADAPTIVE_CLOCK;
+
     switch (mpsse->mode) {
       case SPI0:
         /* SPI mode 0 clock idles low */
@@ -332,26 +366,33 @@
       default:
         retval = MPSSE_FAIL;
     }
+
     /* Send any setup commands to the chip */
     if (retval == MPSSE_OK && setup_commands_size > 0) {
       retval = raw_write(mpsse, setup_commands, setup_commands_size);
     }
+
     if (retval == MPSSE_OK) {
       /* Set the idle pin states */
       set_bits_low(mpsse, mpsse->pidle);
+
       /* All GPIO pins are outputs, set low */
       mpsse->trish = 0xFF;
       mpsse->gpioh = 0x00;
+
       buf[i++] = SET_BITS_HIGH;
       buf[i++] = mpsse->gpioh;
       buf[i++] = mpsse->trish;
+
       retval = raw_write(mpsse, buf, i);
     }
   } else {
     retval = MPSSE_FAIL;
   }
+
   return retval;
 }
+
 /*
  * Sets the appropriate divisor for the desired clock frequency.
  *
@@ -366,6 +407,7 @@
   uint32_t system_clock = 0;
   uint16_t divisor = 0;
   uint8_t buf[CMD_SIZE] = {0};
+
   /* Do not call is_valid_context() here, as the FTDI chip may not be completely
    * configured when SetClock is called */
   if (mpsse) {
@@ -376,23 +418,28 @@
       buf[0] = TCK_D5;
       system_clock = TWELVE_MHZ;
     }
+
     if (raw_write(mpsse, buf, 1) == MPSSE_OK) {
       if (freq <= 0) {
         divisor = 0xFFFF;
       } else {
         divisor = freq2div(system_clock, freq);
       }
+
       buf[0] = TCK_DIVISOR;
       buf[1] = (divisor & 0xFF);
       buf[2] = ((divisor >> 8) & 0xFF);
+
       if (raw_write(mpsse, buf, 3) == MPSSE_OK) {
         mpsse->clock = div2freq(system_clock, divisor);
         retval = MPSSE_OK;
       }
     }
   }
+
   return retval;
 }
+
 /*
  * Retrieves the last error string from libftdi.
  *
@@ -404,8 +451,10 @@
   if (mpsse != NULL) {
     return ftdi_get_error_string(&mpsse->ftdi);
   }
+
   return NULL_CONTEXT_ERROR_MSG;
 }
+
 /*
  * Gets the currently configured clock rate.
  *
@@ -415,11 +464,14 @@
  */
 int GetClock(struct mpsse_context* mpsse) {
   int clock = 0;
+
   if (is_valid_context(mpsse)) {
     clock = mpsse->clock;
   }
+
   return clock;
 }
+
 /*
  * Returns the vendor ID of the FTDI chip.
  *
@@ -429,11 +481,14 @@
  */
 int GetVid(struct mpsse_context* mpsse) {
   int vid = 0;
+
   if (is_valid_context(mpsse)) {
     vid = mpsse->vid;
   }
+
   return vid;
 }
+
 /*
  * Returns the product ID of the FTDI chip.
  *
@@ -443,11 +498,14 @@
  */
 int GetPid(struct mpsse_context* mpsse) {
   int pid = 0;
+
   if (is_valid_context(mpsse)) {
     pid = mpsse->pid;
   }
+
   return pid;
 }
+
 /*
  * Returns the description of the FTDI chip, if any.
  *
@@ -456,12 +514,15 @@
  * Returns the description of the FTDI chip.
  */
 const char* GetDescription(struct mpsse_context* mpsse) {
-  const char* description = NULL;
+  char* description = NULL;
+
   if (is_valid_context(mpsse)) {
     description = mpsse->description;
   }
+
   return description;
 }
+
 /*
  * Enable / disable internal loopback.
  *
@@ -474,16 +535,20 @@
 int SetLoopback(struct mpsse_context* mpsse, int enable) {
   uint8_t buf[1] = {0};
   int retval = MPSSE_FAIL;
+
   if (is_valid_context(mpsse)) {
     if (enable) {
       buf[0] = LOOPBACK_START;
     } else {
       buf[0] = LOOPBACK_END;
     }
+
     retval = raw_write(mpsse, buf, 1);
   }
+
   return retval;
 }
+
 /*
  * Sets the idle state of the chip select pin. CS idles high by default.
  *
@@ -506,8 +571,10 @@
       mpsse->pstart |= CS;
     }
   }
+
   return;
 }
+
 /*
  * Enables or disables flushing of the FTDI chip's RX buffers after each read
  *operation.
@@ -522,6 +589,7 @@
   mpsse->flush_after_read = tf;
   return;
 }
+
 /*
  * Send data start condition.
  *
@@ -532,16 +600,20 @@
  */
 int Start(struct mpsse_context* mpsse) {
   int status = MPSSE_OK;
+
   if (is_valid_context(mpsse)) {
     if (mpsse->mode == I2C && mpsse->status == STARTED) {
       /* Set the default pin states while the clock is low since this is an I2C
        * repeated start condition */
       status |= set_bits_low(mpsse, (mpsse->pidle & ~SK));
+
       /* Make sure the pins are in their default idle state */
       status |= set_bits_low(mpsse, mpsse->pidle);
     }
+
     /* Set the start condition */
     status |= set_bits_low(mpsse, mpsse->pstart);
+
     /*
      * Hackish work around to properly support SPI mode 3.
      * SPI3 clock idles high, but needs to be set low before sending out
@@ -558,13 +630,16 @@
     else if (mpsse->mode == SPI1) {
       status |= set_bits_low(mpsse, (mpsse->pstart | SK));
     }
+
     mpsse->status = STARTED;
   } else {
     status = MPSSE_FAIL;
     mpsse->status = STOPPED;
   }
+
   return status;
 }
+
 /*
  * Performs a bit-wise write of up to 8 bits at a time.
  *
@@ -578,9 +653,11 @@
   uint8_t data[8] = {0};
   size_t i = 0;
   int retval = MPSSE_OK;
+
   if (size > sizeof(data)) {
     size = sizeof(data);
   }
+
   /* Convert each bit in bits to an array of bytes */
   for (i = 0; i < size; i++) {
     if (bits & (1 << i)) {
@@ -592,12 +669,15 @@
       }
     }
   }
+
   /* Enable bit mode before writing, then disable it afterwards. */
   EnableBitmode(mpsse, 1);
   retval = Write(mpsse, data, size);
   EnableBitmode(mpsse, 0);
+
   return retval;
 }
+
 /*
  * Send data out via the selected serial protocol.
  *
@@ -612,6 +692,7 @@
   const uint8_t* data = vdata;
   uint8_t* buf = NULL;
   int retval = MPSSE_FAIL, buf_size = 0, txsize = 0, n = 0;
+
   if (is_valid_context(mpsse)) {
     if (mpsse->mode) {
       while (n < size) {
@@ -619,6 +700,7 @@
         if (txsize > mpsse->xsize) {
           txsize = mpsse->xsize;
         }
+
         /*
          * For I2C we need to send each byte individually so that we can
          * read back each individual ACK bit, so set the transmit size to 1.
@@ -626,14 +708,17 @@
         if (mpsse->mode == I2C) {
           txsize = 1;
         }
+
         buf = build_block_buffer(mpsse, mpsse->tx, data + n, txsize, &buf_size);
         if (buf) {
           retval = raw_write(mpsse, buf, buf_size);
           n += txsize;
           free(buf);
+
           if (retval == MPSSE_FAIL) {
             break;
           }
+
           /* Read in the ACK bit and store it in mpsse->rack */
           if (mpsse->mode == I2C) {
             raw_read(mpsse, (uint8_t*)&mpsse->rack, 1);
@@ -643,31 +728,38 @@
         }
       }
     }
+
     if (retval == MPSSE_OK && n == size) {
       retval = MPSSE_OK;
     }
   }
+
   return retval;
 }
+
 /* Performs a read. For internal use only; see Read() and ReadBits(). */
 static uint8_t* InternalRead(struct mpsse_context* mpsse, int size) {
   uint8_t *data = NULL, *buf = NULL;
   uint8_t sbuf[SPI_RW_SIZE] = {0};
   int n = 0, rxsize = 0, data_size = 0, retval = 0;
+
   if (is_valid_context(mpsse)) {
     if (mpsse->mode) {
       buf = malloc(size);
       if (buf) {
         memset(buf, 0, size);
+
         while (n < size) {
           rxsize = size - n;
           if (rxsize > mpsse->xsize) {
             rxsize = mpsse->xsize;
           }
+
           data = build_block_buffer(mpsse, mpsse->rx, sbuf, rxsize, &data_size);
           if (data) {
             retval = raw_write(mpsse, data, data_size);
             free(data);
+
             if (retval == MPSSE_OK) {
               n += raw_read(mpsse, buf + n, rxsize);
             } else {
@@ -680,8 +772,10 @@
       }
     }
   }
+
   return buf;
 }
+
 /*
  * Reads data over the selected serial protocol.
  *
@@ -698,7 +792,9 @@
 #endif
 {
   uint8_t* buf = NULL;
+
   buf = InternalRead(mpsse, size);
+
 #ifdef SWIGPYTHON
   swig_string_data sdata = {0};
   sdata.size = size;
@@ -708,6 +804,7 @@
   return buf;
 #endif
 }
+
 /*
  * Performs a bit-wise read of up to 8 bits.
  *
@@ -719,16 +816,20 @@
 char ReadBits(struct mpsse_context* mpsse, int size) {
   char bits = 0;
   uint8_t* rdata = NULL;
+
   if (size > 8) {
     size = 8;
   }
+
   EnableBitmode(mpsse, 1);
   rdata = InternalRead(mpsse, size);
   EnableBitmode(mpsse, 0);
+
   if (rdata) {
     /* The last byte in rdata will have all the read bits set or unset as
      * needed. */
     bits = rdata[size - 1];
+
     if (mpsse->endianess == MSB) {
       /*
        * In MSB mode, bits are sifted in from the left. If less than 8 bits were
@@ -743,10 +844,13 @@
        */
       bits = bits >> (8 - size);
     }
+
     free(rdata);
   }
+
   return bits;
 }
+
 /*
  * Reads and writes data over the selected serial protocol (SPI only).
  *
@@ -765,12 +869,14 @@
 {
   uint8_t *txdata = NULL, *buf = NULL;
   int n = 0, data_size = 0, rxsize = 0, retval = 0;
+
   if (is_valid_context(mpsse)) {
     /* Make sure we're configured for one of the SPI modes */
     if (mpsse->mode >= SPI0 && mpsse->mode <= SPI3) {
       buf = malloc(size);
       if (buf) {
         memset(buf, 0, size);
+
         while (n < size) {
           /* When sending and recieving, FTDI chips don't seem to like large
            * data blocks. Limit the size of each block to SPI_TRANSFER_SIZE */
@@ -778,12 +884,13 @@
           if (rxsize > SPI_TRANSFER_SIZE) {
             rxsize = SPI_TRANSFER_SIZE;
           }
-          txdata =
-              build_block_buffer(mpsse, mpsse->txrx, data + n,
-                                 rxsize, &data_size);
+
+          txdata = build_block_buffer(mpsse, mpsse->txrx, data + n, rxsize,
+                                      &data_size);
           if (txdata) {
             retval = raw_write(mpsse, txdata, data_size);
             free(txdata);
+
             if (retval == MPSSE_OK) {
               n += raw_read(mpsse, (buf + n), rxsize);
             } else {
@@ -796,6 +903,7 @@
       }
     }
   }
+
 #ifdef SWIGPYTHON
   swig_string_data sdata = {0};
   sdata.size = n;
@@ -805,6 +913,7 @@
   return buf;
 #endif
 }
+
 /*
  * Returns the last received ACK bit.
  *
@@ -814,11 +923,14 @@
  */
 int GetAck(struct mpsse_context* mpsse) {
   int ack = 0;
+
   if (is_valid_context(mpsse)) {
     ack = (mpsse->rack & 0x01);
   }
+
   return ack;
 }
+
 /*
  * Sets the transmitted ACK bit.
  *
@@ -835,8 +947,10 @@
       mpsse->tack = 0x00;
     }
   }
+
   return;
 }
+
 /*
  * Causes libmpsse to send ACKs after each read byte in I2C mode.
  *
@@ -847,6 +961,7 @@
 void SendAcks(struct mpsse_context* mpsse) {
   return SetAck(mpsse, ACK);
 }
+
 /*
  * Causes libmpsse to send NACKs after each read byte in I2C mode.
  *
@@ -857,6 +972,7 @@
 void SendNacks(struct mpsse_context* mpsse) {
   return SetAck(mpsse, NACK);
 }
+
 /*
  * Send data stop condition.
  *
@@ -867,25 +983,31 @@
  */
 int Stop(struct mpsse_context* mpsse) {
   int retval = MPSSE_OK;
+
   if (is_valid_context(mpsse)) {
     /* In I2C mode, we need to ensure that the data line goes low while the
      * clock line is low to avoid sending an inadvertent start condition */
     if (mpsse->mode == I2C) {
       retval |= set_bits_low(mpsse, (mpsse->pidle & ~DO & ~SK));
     }
+
     /* Send the stop condition */
     retval |= set_bits_low(mpsse, mpsse->pstop);
+
     if (retval == MPSSE_OK) {
       /* Restore the pins to their idle states */
       retval |= set_bits_low(mpsse, mpsse->pidle);
     }
+
     mpsse->status = STOPPED;
   } else {
     retval = MPSSE_FAIL;
     mpsse->status = STOPPED;
   }
+
   return retval;
 }
+
 /*
  * Sets the specified pin high.
  *
@@ -897,11 +1019,14 @@
  */
 int PinHigh(struct mpsse_context* mpsse, int pin) {
   int retval = MPSSE_FAIL;
+
   if (is_valid_context(mpsse)) {
     retval = gpio_write(mpsse, pin, HIGH);
   }
+
   return retval;
 }
+
 /*
  * Sets the specified pin low.
  *
@@ -913,11 +1038,14 @@
  */
 int PinLow(struct mpsse_context* mpsse, int pin) {
   int retval = MPSSE_FAIL;
+
   if (is_valid_context(mpsse)) {
     retval = gpio_write(mpsse, pin, LOW);
   }
+
   return retval;
 }
+
 /*
  * Sets the input/output direction of all pins. For use in BITBANG mode only.
  *
@@ -928,6 +1056,7 @@
  */
 int SetDirection(struct mpsse_context* mpsse, uint8_t direction) {
   int retval = MPSSE_FAIL;
+
   if (is_valid_context(mpsse)) {
     if (mpsse->mode == BITBANG) {
       if (ftdi_set_bitmode(&mpsse->ftdi, direction, BITMODE_BITBANG) == 0) {
@@ -935,8 +1064,10 @@
       }
     }
   }
+
   return retval;
 }
+
 /*
  * Sets the input/output value of all pins. For use in BITBANG mode only.
  *
@@ -947,6 +1078,7 @@
  */
 int WritePins(struct mpsse_context* mpsse, uint8_t data) {
   int retval = MPSSE_FAIL;
+
   if (is_valid_context(mpsse)) {
     if (mpsse->mode == BITBANG) {
       if (ftdi_write_data(&mpsse->ftdi, &data, 1) == 0) {
@@ -954,8 +1086,10 @@
       }
     }
   }
+
   return retval;
 }
+
 /*
  * Reads the state of the chip's pins. For use in BITBANG mode only.
  *
@@ -965,11 +1099,14 @@
  */
 int ReadPins(struct mpsse_context* mpsse) {
   uint8_t val = 0;
+
   if (is_valid_context(mpsse)) {
     ftdi_read_pins((struct ftdi_context*)&mpsse->ftdi, (uint8_t*)&val);
   }
+
   return (int)val;
 }
+
 /*
  * Checks if a specific pin is high or low. For use in BITBANG mode only.
  *
@@ -984,13 +1121,16 @@
   if (state == -1) {
     state = ReadPins(mpsse);
   }
+
   /* If not in bitbang mode, the specified pin should be one of GPIOLx. Convert
    * these defines into an absolute pin number. */
   if (mpsse->mode != BITBANG) {
     pin += NUM_GPIOL_PINS;
   }
+
   return ((state & (1 << pin)) >> pin);
 }
+
 /*
  * Places all I/O pins into a tristate mode.
  *
@@ -1000,9 +1140,11 @@
  */
 int Tristate(struct mpsse_context* mpsse) {
   uint8_t cmd[CMD_SIZE] = {0};
+
   /* Tristate the all I/O pins (FT232H only) */
   cmd[0] = TRISTATE_IO;
   cmd[1] = 0xFF;
   cmd[2] = 0xFF;
+
   return raw_write(mpsse, cmd, sizeof(cmd));
 }
diff --git a/sw/host/vendor/mpsse/mpsse.h b/sw/host/vendor/mpsse/mpsse.h
index eeeb49e..07b8cae 100644
--- a/sw/host/vendor/mpsse/mpsse.h
+++ b/sw/host/vendor/mpsse/mpsse.h
@@ -1,51 +1,62 @@
 /*
- Copyright (C) 2015 The Android Open Source Project
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
-      http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
- */
- /*
+ *Copyright (C) 2015 The Android Open Source Project
+ *
+ *Licensed under the Apache License, Version 2.0 (the "License");
+ *you may not use this file except in compliance with the License.
+ *You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *Unless required by applicable law or agreed to in writing, software
+ *distributed under the License is distributed on an "AS IS" BASIS,
+ *WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *See the License for the specific language governing permissions and
+ *limitations under the License.
+ *
  * This file was copied from https://github.com/devttys0/libmpsse.git (sha1
  * f1a6744b), and modified to suite the Chromium OS project.
  */
+
 #ifndef TRUNKS_FTDI_MPSSE_H_
 #define TRUNKS_FTDI_MPSSE_H_
+
 #include <libftdi1/ftdi.h>
 #include <stdint.h>
+
 #define MPSSE_OK 0
 #define MPSSE_FAIL -1
+
 #define MSB 0x00
 #define LSB 0x08
+
 #define CHUNK_SIZE 65535
 #define SPI_RW_SIZE (63 * 1024)
 #define SPI_TRANSFER_SIZE 512
 #define I2C_TRANSFER_SIZE 64
+
 #define LATENCY_MS 2
 #define TIMEOUT_DIVISOR 1000000
 #define USB_TIMEOUT 120000
 #define SETUP_DELAY 25000
+
 #define BITMODE_RESET 0
 #define BITMODE_MPSSE 2
+
 #define CMD_SIZE 3
 #define MAX_SETUP_COMMANDS 10
 #define SS_TX_COUNT 3
+
 #define LOW 0
 #define HIGH 1
 #define NUM_GPIOL_PINS 4
 #define NUM_GPIO_PINS 12
+
 #define NULL_CONTEXT_ERROR_MSG "NULL MPSSE context pointer!"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
+
 /* FTDI interfaces */
 enum interface {
   IFACE_ANY = INTERFACE_ANY,
@@ -54,6 +65,7 @@
   IFACE_C = INTERFACE_C,
   IFACE_D = INTERFACE_D
 };
+
 /* Common clock rates */
 enum clock_rates {
   ONE_HUNDRED_KHZ = 100000,
@@ -68,6 +80,7 @@
   THIRTY_MHZ = 30000000,
   SIXTY_MHZ = 60000000
 };
+
 /* Supported MPSSE modes */
 enum modes {
   SPI0 = 1,
@@ -78,6 +91,7 @@
   GPIO = 6,
   BITBANG = 7,
 };
+
 enum pins {
   SK = 1,
   DO = 2,
@@ -88,6 +102,7 @@
   GPIO2 = 64,
   GPIO3 = 128
 };
+
 enum gpio_pins {
   GPIOL0 = 0,
   GPIOL1 = 1,
@@ -102,10 +117,13 @@
   GPIOH6 = 10,
   GPIOH7 = 11
 };
+
 enum i2c_ack { ACK = 0, NACK = 1 };
+
 /* SK/DO/CS and GPIOs are outputs, DI is an input */
 #define DEFAULT_TRIS (SK | DO | CS | GPIO0 | GPIO1 | GPIO2 | GPIO3)
 #define DEFAULT_PORT (SK | CS) /* SK and CS are high, all others low */
+
 enum mpsse_commands {
   INVALID_COMMAND = 0xAB,
   ENABLE_ADAPTIVE_CLOCK = 0x96,
@@ -122,14 +140,17 @@
   CLOCK_N8_CYCLES_IO_LOW = 0x9D,
   TRISTATE_IO = 0x9E,
 };
+
 enum low_bits_status { STARTED, STOPPED };
+
 struct vid_pid {
   int vid;
   int pid;
-  const char* description;
+  char* description;
 };
+
 struct mpsse_context {
-  const char* description;
+  char* description;
   struct ftdi_context ftdi;
   enum modes mode;
   enum low_bits_status status;
@@ -153,6 +174,7 @@
   uint8_t tack;
   uint8_t rack;
 };
+
 struct mpsse_context* MPSSE(enum modes mode, int freq, int endianess);
 struct mpsse_context* Open(int vid,
                            int pid,
@@ -200,17 +222,19 @@
 int PinState(struct mpsse_context* mpsse, int pin, int state);
 int Tristate(struct mpsse_context* mpsse);
 char Version(void);
+
 #ifdef SWIGPYTHON
 typedef struct swig_string_data {
   int size;
   char* data;
 } swig_string_data;
+
 swig_string_data Read(struct mpsse_context* mpsse, int size);
 swig_string_data Transfer(struct mpsse_context* mpsse, char* data, int size);
 #else
 uint8_t* Read(struct mpsse_context* mpsse, int size);
-uint8_t* Transfer(struct mpsse_context* mpsse,
-                        uint8_t* data, int size);
+uint8_t* Transfer(struct mpsse_context* mpsse, uint8_t* data, int size);
+
 int FastWrite(struct mpsse_context* mpsse, char* data, int size);
 int FastRead(struct mpsse_context* mpsse, char* data, int size);
 int FastTransfer(struct mpsse_context* mpsse,
@@ -221,4 +245,4 @@
 #ifdef __cplusplus
 }
 #endif
-#endif  /* TRUNKS_FTDI_MPSSE_H_ */
+#endif /* TRUNKS_FTDI_MPSSE_H_ */
diff --git a/sw/host/vendor/mpsse/support.c b/sw/host/vendor/mpsse/support.c
index 930d7aa..fd0809d 100644
--- a/sw/host/vendor/mpsse/support.c
+++ b/sw/host/vendor/mpsse/support.c
@@ -1,20 +1,19 @@
 /*
- *
- *Copyright (C) 2015 The Android Open Source Project
- *
- *Licensed under the Apache License, Version 2.0 (the "License");
- *you may not use this file except in compliance with the License.
- *You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- *Unless required by applicable law or agreed to in writing, software
- *distributed under the License is distributed on an "AS IS" BASIS,
- *WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- *See the License for the specific language governing permissions and
- *limitations under the License.
- *
- *
+** Copyright (C) 2015 The Android Open Source Project
+**
+** Licensed under the Apache License, Version 2.0 (the "License");
+** you may not use this file except in compliance with the License.
+** You may obtain a copy of the License at
+**
+**      http://www.apache.org/licenses/LICENSE-2.0
+**
+** Unless required by applicable law or agreed to in writing, software
+** distributed under the License is distributed on an "AS IS" BASIS,
+** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+** See the License for the specific language governing permissions and
+** limitations under the License.
+**/
+/*
  * This file was copied from https://github.com/devttys0/libmpsse.git (sha1
  * f1a6744b), and modified to suite the Chromium OS project.
  *
@@ -23,210 +22,257 @@
  * Craig Heffner
  * 27 December 2011
  */
-#include "support.h"
-
 #include <stdlib.h>
 #include <string.h>
+
+#include "support.h"
+
 /* Write data to the FTDI chip */
 int raw_write(struct mpsse_context* mpsse, uint8_t* buf, int size) {
-  int retval = MPSSE_FAIL;
-  if (mpsse->mode) {
-    if (ftdi_write_data(&mpsse->ftdi, buf, size) == size) {
-      retval = MPSSE_OK;
-    }
-  }
-  return retval;
-}
-/* Read data from the FTDI chip */
-int raw_read(struct mpsse_context* mpsse, uint8_t* buf, int size) {
-  int n = 0, r = 0;
-  if (mpsse->mode) {
-    while (n < size) {
-      r = ftdi_read_data(&mpsse->ftdi, buf, size);
-      if (r < 0)
-        break;
-      n += r;
-    }
-    if (mpsse->flush_after_read) {
-      /*
-       * Make sure the buffers are cleared after a read or subsequent reads may
-       *fail.
-       *
-       * Is this needed anymore? It slows down repetitive read operations by
-       *~8%.
-       */
-      ftdi_usb_purge_rx_buffer(&mpsse->ftdi);
-    }
-  }
-  return n;
-}
-/* Sets the read and write timeout periods for bulk usb data transfers. */
-void set_timeouts(struct mpsse_context* mpsse, int timeout) {
-  if (mpsse->mode) {
-    mpsse->ftdi.usb_read_timeout = timeout;
-    mpsse->ftdi.usb_write_timeout = timeout;
-  }
-  return;
-}
-/* Convert a frequency to a clock divisor */
-uint16_t freq2div(uint32_t system_clock, uint32_t freq) {
-  return (((system_clock / freq) / 2) - 1);
-}
-/* Convert a clock divisor to a frequency */
-uint32_t div2freq(uint32_t system_clock, uint16_t div) {
-  return (system_clock / ((1 + div) * 2));
-}
-/* Builds a buffer of commands + data blocks */
-uint8_t* build_block_buffer(struct mpsse_context* mpsse,
-                                  uint8_t cmd,
-                                  const uint8_t* data,
-                                  int size,
-                                  int* buf_size) {
-  uint8_t* buf = NULL;
-  int i = 0, j = 0, k = 0, dsize = 0, num_blocks = 0, total_size = 0,
-      xfer_size = 0;
-  uint16_t rsize = 0;
-  *buf_size = 0;
-  /* Data block size is 1 in I2C, or when in bitmode */
-  if (mpsse->mode == I2C || (cmd & MPSSE_BITMODE)) {
-    xfer_size = 1;
-  } else {
-    xfer_size = mpsse->xsize;
-  }
-  num_blocks = (size / xfer_size);
-  if (size % xfer_size) {
-    num_blocks++;
-  }
-  /* The total size of the data will be the data size + the write command */
-  total_size = size + (CMD_SIZE * num_blocks);
-  /* In I2C we have to add 3 additional commands per data block */
-  if (mpsse->mode == I2C) {
-    total_size += (CMD_SIZE * 3 * num_blocks);
-  }
-  buf = malloc(total_size);
-  if (buf) {
-    memset(buf, 0, total_size);
-    for (j = 0; j < num_blocks; j++) {
-      dsize = size - k;
-      if (dsize > xfer_size) {
-        dsize = xfer_size;
-      }
-      /* The reported size of this block is block size - 1 */
-      rsize = dsize - 1;
-      /* For I2C we need to ensure that the clock pin is set low prior to
-       * clocking out data */
-      if (mpsse->mode == I2C) {
-        buf[i++] = SET_BITS_LOW;
-        buf[i++] = mpsse->pstart & ~SK;
-        /* On receive, we need to ensure that the data out line is set as an
-         * input to avoid contention on the bus */
-        if (cmd == mpsse->rx) {
-          buf[i++] = mpsse->tris & ~DO;
-        } else {
-          buf[i++] = mpsse->tris;
-        }
-      }
-      /* Copy in the command for this block */
-      buf[i++] = cmd;
-      buf[i++] = (rsize & 0xFF);
-      if (!(cmd & MPSSE_BITMODE)) {
-        buf[i++] = ((rsize >> 8) & 0xFF);
-      }
-      /* On a write, copy the data to transmit after the command */
-      if (cmd == mpsse->tx || cmd == mpsse->txrx) {
-        memcpy(buf + i, data + k, dsize);
-        /* i == offset into buf */
-        i += dsize;
-        /* k == offset into data */
-        k += dsize;
-      }
-      /* In I2C mode we need to clock one ACK bit after each byte */
-      if (mpsse->mode == I2C) {
-        /* If we are receiving data, then we need to clock out an ACK for each
-         * byte */
-        if (cmd == mpsse->rx) {
-          buf[i++] = SET_BITS_LOW;
-          buf[i++] = mpsse->pstart & ~SK;
-          buf[i++] = mpsse->tris;
-          buf[i++] = mpsse->tx | MPSSE_BITMODE;
-          buf[i++] = 0;
-          buf[i++] = mpsse->tack;
-        }
-        /* If we are sending data, then we need to clock in an ACK for each byte
-           */
-        else if (cmd == mpsse->tx) {
-          /* Need to make data out an input to avoid contention on the bus when
-           * the slave sends an ACK */
-          buf[i++] = SET_BITS_LOW;
-          buf[i++] = mpsse->pstart & ~SK;
-          buf[i++] = mpsse->tris & ~DO;
-          buf[i++] = mpsse->rx | MPSSE_BITMODE;
-          buf[i++] = 0;
-          buf[i++] = SEND_IMMEDIATE;
-        }
-      }
-    }
-    *buf_size = i;
-  }
-  return buf;
-}
-/* Set the low bit pins high/low */
-int set_bits_low(struct mpsse_context* mpsse, int port) {
-  char buf[CMD_SIZE] = {0};
-  buf[0] = SET_BITS_LOW;
-  buf[1] = port;
-  buf[2] = mpsse->tris;
-  return raw_write(mpsse, (uint8_t*)&buf, sizeof(buf));
-}
-/* Set the high bit pins high/low */
-int set_bits_high(struct mpsse_context* mpsse, int port) {
-  char buf[CMD_SIZE] = {0};
-  buf[0] = SET_BITS_HIGH;
-  buf[1] = port;
-  buf[2] = mpsse->trish;
-  return raw_write(mpsse, (uint8_t*)&buf, sizeof(buf));
-}
-/* Set the GPIO pins high/low */
-int gpio_write(struct mpsse_context* mpsse, int pin, int direction) {
-  int retval = MPSSE_FAIL;
-  if (mpsse->mode == BITBANG) {
-    if (direction == HIGH) {
-      mpsse->bitbang |= (1 << pin);
-    } else {
-      mpsse->bitbang &= ~(1 << pin);
-    }
-    if (set_bits_high(mpsse, mpsse->bitbang) == MPSSE_OK) {
-      retval = raw_write(mpsse, (uint8_t*)&mpsse->bitbang, 1);
-    }
-  } else {
-    /* The first four pins can't be changed unless we are in a stopped status */
-    if (pin < NUM_GPIOL_PINS && mpsse->status == STOPPED) {
-      /* Convert pin number (0-3) to the corresponding pin bit */
-      pin = (GPIO0 << pin);
-      if (direction == HIGH) {
-        mpsse->pstart |= pin;
-        mpsse->pidle |= pin;
-        mpsse->pstop |= pin;
-      } else {
-        mpsse->pstart &= ~pin;
-        mpsse->pidle &= ~pin;
-        mpsse->pstop &= ~pin;
-      }
-      retval = set_bits_low(mpsse, mpsse->pstop);
-    } else if (pin >= NUM_GPIOL_PINS && pin < NUM_GPIO_PINS) {
-      /* Convert pin number (4 - 11) to the corresponding pin bit */
-      pin -= NUM_GPIOL_PINS;
-      if (direction == HIGH) {
-        mpsse->gpioh |= (1 << pin);
-      } else {
-        mpsse->gpioh &= ~(1 << pin);
-      }
-      retval = set_bits_high(mpsse, mpsse->gpioh);
-    }
-  }
-  return retval;
-}
-/* Checks if a given MPSSE context is valid. */
-int is_valid_context(struct mpsse_context* mpsse) {
-  return mpsse != NULL;
-}
+   int retval = MPSSE_FAIL;
+
+   if (mpsse->mode) {
+     if (ftdi_write_data(&mpsse->ftdi, buf, size) == size) {
+       retval = MPSSE_OK;
+     }
+   }
+
+   return retval;
+ }
+
+ /* Read data from the FTDI chip */
+ int raw_read(struct mpsse_context* mpsse, uint8_t* buf, int size) {
+   int n = 0, r = 0;
+
+   if (mpsse->mode) {
+     while (n < size) {
+       r = ftdi_read_data(&mpsse->ftdi, buf, size);
+       if (r < 0)
+         break;
+       n += r;
+     }
+
+     if (mpsse->flush_after_read) {
+       /*
+        * Make sure the buffers are cleared after a read or subsequent reads may
+        *fail.
+        *
+        * Is this needed anymore? It slows down repetitive read operations by
+        *~8%.
+        */
+       ftdi_usb_purge_rx_buffer(&mpsse->ftdi);
+     }
+   }
+
+   return n;
+ }
+
+ /* Sets the read and write timeout periods for bulk usb data transfers. */
+ void set_timeouts(struct mpsse_context* mpsse, int timeout) {
+   if (mpsse->mode) {
+     mpsse->ftdi.usb_read_timeout = timeout;
+     mpsse->ftdi.usb_write_timeout = timeout;
+   }
+
+   return;
+ }
+
+ /* Convert a frequency to a clock divisor */
+ uint16_t freq2div(uint32_t system_clock, uint32_t freq) {
+   return (((system_clock / freq) / 2) - 1);
+ }
+
+ /* Convert a clock divisor to a frequency */
+ uint32_t div2freq(uint32_t system_clock, uint16_t div) {
+   return (system_clock / ((1 + div) * 2));
+ }
+
+ /* Builds a buffer of commands + data blocks */
+ uint8_t* build_block_buffer(struct mpsse_context* mpsse,
+                             uint8_t cmd,
+                             const uint8_t* data,
+                             int size,
+                             int* buf_size) {
+   uint8_t* buf = NULL;
+   int i = 0, j = 0, k = 0, dsize = 0, num_blocks = 0, total_size = 0,
+       xfer_size = 0;
+   uint16_t rsize = 0;
+
+   *buf_size = 0;
+
+   /* Data block size is 1 in I2C, or when in bitmode */
+   if (mpsse->mode == I2C || (cmd & MPSSE_BITMODE)) {
+     xfer_size = 1;
+   } else {
+     xfer_size = mpsse->xsize;
+   }
+
+   num_blocks = (size / xfer_size);
+   if (size % xfer_size) {
+     num_blocks++;
+   }
+
+   /* The total size of the data will be the data size + the write command */
+   total_size = size + (CMD_SIZE * num_blocks);
+
+   /* In I2C we have to add 3 additional commands per data block */
+   if (mpsse->mode == I2C) {
+     total_size += (CMD_SIZE * 3 * num_blocks);
+   }
+
+   buf = malloc(total_size);
+   if (buf) {
+     memset(buf, 0, total_size);
+
+     for (j = 0; j < num_blocks; j++) {
+       dsize = size - k;
+       if (dsize > xfer_size) {
+         dsize = xfer_size;
+       }
+
+       /* The reported size of this block is block size - 1 */
+       rsize = dsize - 1;
+
+       /* For I2C we need to ensure that the clock pin is set low prior to
+        * clocking out data */
+       if (mpsse->mode == I2C) {
+         buf[i++] = SET_BITS_LOW;
+         buf[i++] = mpsse->pstart & ~SK;
+
+         /* On receive, we need to ensure that the data out line is set as an
+          * input to avoid contention on the bus */
+         if (cmd == mpsse->rx) {
+           buf[i++] = mpsse->tris & ~DO;
+         } else {
+           buf[i++] = mpsse->tris;
+         }
+       }
+
+       /* Copy in the command for this block */
+       buf[i++] = cmd;
+       buf[i++] = (rsize & 0xFF);
+       if (!(cmd & MPSSE_BITMODE)) {
+         buf[i++] = ((rsize >> 8) & 0xFF);
+       }
+
+       /* On a write, copy the data to transmit after the command */
+       if (cmd == mpsse->tx || cmd == mpsse->txrx) {
+         memcpy(buf + i, data + k, dsize);
+
+         /* i == offset into buf */
+         i += dsize;
+         /* k == offset into data */
+         k += dsize;
+       }
+
+       /* In I2C mode we need to clock one ACK bit after each byte */
+       if (mpsse->mode == I2C) {
+         /* If we are receiving data, then we need to clock out an ACK for each
+          * byte */
+         if (cmd == mpsse->rx) {
+           buf[i++] = SET_BITS_LOW;
+           buf[i++] = mpsse->pstart & ~SK;
+           buf[i++] = mpsse->tris;
+
+           buf[i++] = mpsse->tx | MPSSE_BITMODE;
+           buf[i++] = 0;
+           buf[i++] = mpsse->tack;
+         }
+         /* If we are sending data, then we need to clock in an ACK for each
+          * byte
+            */
+         else if (cmd == mpsse->tx) {
+           /* Need to make data out an input to avoid contention on the bus when
+            * the slave sends an ACK */
+           buf[i++] = SET_BITS_LOW;
+           buf[i++] = mpsse->pstart & ~SK;
+           buf[i++] = mpsse->tris & ~DO;
+
+           buf[i++] = mpsse->rx | MPSSE_BITMODE;
+           buf[i++] = 0;
+           buf[i++] = SEND_IMMEDIATE;
+         }
+       }
+     }
+
+     *buf_size = i;
+   }
+
+   return buf;
+ }
+
+ /* Set the low bit pins high/low */
+ int set_bits_low(struct mpsse_context* mpsse, int port) {
+   char buf[CMD_SIZE] = {0};
+
+   buf[0] = SET_BITS_LOW;
+   buf[1] = port;
+   buf[2] = mpsse->tris;
+
+   return raw_write(mpsse, (uint8_t*)&buf, sizeof(buf));
+ }
+
+ /* Set the high bit pins high/low */
+ int set_bits_high(struct mpsse_context* mpsse, int port) {
+   char buf[CMD_SIZE] = {0};
+
+   buf[0] = SET_BITS_HIGH;
+   buf[1] = port;
+   buf[2] = mpsse->trish;
+
+   return raw_write(mpsse, (uint8_t*)&buf, sizeof(buf));
+ }
+
+ /* Set the GPIO pins high/low */
+ int gpio_write(struct mpsse_context* mpsse, int pin, int direction) {
+   int retval = MPSSE_FAIL;
+
+   if (mpsse->mode == BITBANG) {
+     if (direction == HIGH) {
+       mpsse->bitbang |= (1 << pin);
+     } else {
+       mpsse->bitbang &= ~(1 << pin);
+     }
+
+     if (set_bits_high(mpsse, mpsse->bitbang) == MPSSE_OK) {
+       retval = raw_write(mpsse, (uint8_t*)&mpsse->bitbang, 1);
+     }
+   } else {
+     /* The first four pins can't be changed unless we are in a stopped status
+      */
+     if (pin < NUM_GPIOL_PINS && mpsse->status == STOPPED) {
+       /* Convert pin number (0-3) to the corresponding pin bit */
+       pin = (GPIO0 << pin);
+
+       if (direction == HIGH) {
+         mpsse->pstart |= pin;
+         mpsse->pidle |= pin;
+         mpsse->pstop |= pin;
+       } else {
+         mpsse->pstart &= ~pin;
+         mpsse->pidle &= ~pin;
+         mpsse->pstop &= ~pin;
+       }
+
+       retval = set_bits_low(mpsse, mpsse->pstop);
+     } else if (pin >= NUM_GPIOL_PINS && pin < NUM_GPIO_PINS) {
+       /* Convert pin number (4 - 11) to the corresponding pin bit */
+       pin -= NUM_GPIOL_PINS;
+
+       if (direction == HIGH) {
+         mpsse->gpioh |= (1 << pin);
+       } else {
+         mpsse->gpioh &= ~(1 << pin);
+       }
+
+       retval = set_bits_high(mpsse, mpsse->gpioh);
+     }
+   }
+
+   return retval;
+ }
+
+ /* Checks if a given MPSSE context is valid. */
+ int is_valid_context(struct mpsse_context* mpsse) {
+   return mpsse != NULL;
+ }
diff --git a/sw/host/vendor/mpsse/support.h b/sw/host/vendor/mpsse/support.h
index 949540c..2b0af5a 100644
--- a/sw/host/vendor/mpsse/support.h
+++ b/sw/host/vendor/mpsse/support.h
@@ -1,23 +1,23 @@
 /*
- *
- *Copyright (C) 2015 The Android Open Source Project
- *
- *Licensed under the Apache License, Version 2.0 (the "License");
- *you may not use this file except in compliance with the License.
- *You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- *Unless required by applicable law or agreed to in writing, software
- *distributed under the License is distributed on an "AS IS" BASIS,
- *WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- *See the License for the specific language governing permissions and
- *limitations under the License.
- *
- *
+** Copyright (C) 2015 The Android Open Source Project
+**
+** Licensed under the Apache License, Version 2.0 (the "License");
+** you may not use this file except in compliance with the License.
+** You may obtain a copy of the License at
+**
+**      http://www.apache.org/licenses/LICENSE-2.0
+**
+** Unless required by applicable law or agreed to in writing, software
+** distributed under the License is distributed on an "AS IS" BASIS,
+** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+** See the License for the specific language governing permissions and
+** limitations under the License.
+**/
+/*
  * This file was copied from https://github.com/devttys0/libmpsse.git (sha1
  * f1a6744b), and modified to suite the Chromium OS project.
  */
+
 #ifndef TRUNKS_FTDI_SUPPORT_H_
 #define TRUNKS_FTDI_SUPPORT_H_
 
@@ -31,12 +31,13 @@
 uint16_t freq2div(uint32_t system_clock, uint32_t freq);
 uint32_t div2freq(uint32_t system_clock, uint16_t div);
 uint8_t* build_block_buffer(struct mpsse_context* mpsse,
-                                  uint8_t cmd,
-                                  const uint8_t* data,
-                                  int size,
-                                  int* buf_size);
+                            uint8_t cmd,
+                            const uint8_t* data,
+                            int size,
+                            int* buf_size);
 int set_bits_high(struct mpsse_context* mpsse, int port);
 int set_bits_low(struct mpsse_context* mpsse, int port);
 int gpio_write(struct mpsse_context* mpsse, int pin, int direction);
 int is_valid_context(struct mpsse_context* mpsse);
-#endif  /*  TRUNKS_FTDI_SUPPORT_H_ */
+
+#endif /*  TRUNKS_FTDI_SUPPORT_H_ */
diff --git a/sw/host/vendor/patches/mpsse/0001-fix-mpsse-include-paths.patch b/sw/host/vendor/patches/mpsse/0001-fix-mpsse-include-paths.patch
new file mode 100644
index 0000000..b976536
--- /dev/null
+++ b/sw/host/vendor/patches/mpsse/0001-fix-mpsse-include-paths.patch
@@ -0,0 +1,36 @@
+diff -u a/mpsse.c b/mpsse.c
+--- a/mpsse.c	2019-10-29 12:33:31.320820373 -0400
++++ b/mpsse.c	2019-10-29 12:37:39.902739820 -0400
+@@ -27,7 +27,7 @@
+ #include <stdint.h>
+ #include <unistd.h>
+ 
+-#include "trunks/ftdi/support.h"
++#include "support.h"
+ 
+ /* List of known FT2232-based devices */
+ struct vid_pid supported_devices[] = {
+diff -u a/support.c b/support.c
+--- a/support.c	2019-10-29 12:33:31.320820373 -0400
++++ b/support.c	2019-10-29 12:49:02.917016570 -0400
+@@ -24,7 +24,7 @@
+  */
+ #include <string.h>
+ 
+-#include "trunks/ftdi/support.h"
++#include "support.h"
+ 
+ /* Write data to the FTDI chip */
+ int raw_write(struct mpsse_context* mpsse, uint8_t* buf, int size) {
+diff -u a/support.h b/support.h
+--- a/support.h	2019-10-29 12:33:31.320820373 -0400
++++ b/support.h	2019-10-29 12:37:10.578985323 -0400
+@@ -21,7 +21,7 @@
+ #ifndef TRUNKS_FTDI_SUPPORT_H_
+ #define TRUNKS_FTDI_SUPPORT_H_
+ 
+-#include "trunks/ftdi/mpsse.h"
++#include "mpsse.h"
+ 
+ int raw_write(struct mpsse_context* mpsse, uint8_t* buf, int size);
+ int raw_read(struct mpsse_context* mpsse, uint8_t* buf, int size);
diff --git a/sw/host/vendor/patches/mpsse/0002-mpsse-support-h-include-stddef-h.patch b/sw/host/vendor/patches/mpsse/0002-mpsse-support-h-include-stddef-h.patch
new file mode 100644
index 0000000..2c4fe44
--- /dev/null
+++ b/sw/host/vendor/patches/mpsse/0002-mpsse-support-h-include-stddef-h.patch
@@ -0,0 +1,12 @@
+diff -u a/support.h b/support.h
+--- a/support.h	2019-10-29 12:37:10.578985323 -0400
++++ b/support.h	2019-10-29 13:42:46.177892181 -0400
+@@ -21,6 +21,8 @@
+ #ifndef TRUNKS_FTDI_SUPPORT_H_
+ #define TRUNKS_FTDI_SUPPORT_H_
+ 
++#include <stddef.h>
++
+ #include "mpsse.h"
+ 
+ int raw_write(struct mpsse_context* mpsse, uint8_t* buf, int size);
diff --git a/sw/host/vendor/patches/mpsse/0003-mpsse-support-c-include-stdlib-h.patch b/sw/host/vendor/patches/mpsse/0003-mpsse-support-c-include-stdlib-h.patch
new file mode 100644
index 0000000..4e64801
--- /dev/null
+++ b/sw/host/vendor/patches/mpsse/0003-mpsse-support-c-include-stdlib-h.patch
@@ -0,0 +1,11 @@
+diff -u a/support.c b/support.c
+--- a/support.c	2019-10-29 15:26:49.785057144 -0400
++++ b/support.c	2019-10-29 15:28:09.184385584 -0400
+@@ -22,6 +22,7 @@
+  * Craig Heffner
+  * 27 December 2011
+  */
++#include <stdlib.h>
+ #include <string.h>
+ 
+ #include "support.h"