For detailed information on AES design features, please see the AES HWIP Technical Specification.
AES testbench has been constructed based on the CIP testbench architecture.
Top level testbench is located at hw/ip/aes/dv/tb/tb.sv
. It instantiates the AES DUT module hw/ip/aes/rtl/aes.sv
. In addition, it instantiates the following interfaces, connects them to the DUT and sets their handle into uvm_config_db
:
The following utilities provide generic helper tasks and functions to perform activities that are common across the project:
All common types and methods defined at the package level can be found in aes_env_pkg
. Some of them in use are:
parameter uint NUM_ALERTS = 2;
AES instantiates (already handled in CIP base env) tl_agent which provides the ability to drive and independently monitor random traffic via TL host interface into AES device.
AES instantiates (already handles in the CIP base env) edn_agent which provides the ability to drive and monitor edn traffic via the edn interface.
The AES RAL model is created with the ralgen
FuseSoC generator script automatically when the simulation is at the build stage.
It can be created manually by invoking regtool
:
All test sequences reside in hw/ip/aes/dv/env/seq_lib
. The aes_base_vseq
virtual sequence is extended from cip_base_vseq
and serves as a starting point. All test sequences are extended from aes_base_vseq
. aes_base_vseq
provides commonly used handles, variables, functions and tasks that the test sequences can simply use / call. The tasks can be split into two groups and those that provide more complex functionality. Simple tasks include:
More complex tasks include: These are the ones used by the higher level sequences and the ones that should be used to create new tests from:
Using these higher level functions and tasks one can build a highly customized constraint random test without low level knowledge of the test environment and the DUT.
Most tests use the aes_stress_vseq sequence as test sequence, and achieves different tests scenarios by using the constrained knobs to generate different behavior.
To ensure high quality constrained random stimulus, it is necessary to develop a functional coverage model. The model will cover that the test plan is exercising the expected test points and that we cover all functionality. The functional coverage plan can be found here coverage_plan
The aes_scoreboard
is primarily used for end to end checking. It creates the following analysis FIFOs to retrieve the data monitored by corresponding interface agents:
These 2 FIFOs provide transaction items at the end of the address channel and data channel respectively. Each FIFO is monitored and incoming transactions are stored. Whenever a transaction is finished the sequence item is handed over to a reference model that will generate the expected response. At the same time the scoreboard is waiting for the result of the AES module to compute. Once complete the result is scored against the prediction made by the reference model.
The reference model is selected to be either a C-implementation or an SSL-library selected on a random basis with the default distribution of 80% OpenSSL/BoringSSL and 20% C-model.
The default behavior for the verification is that the scoreboard wait until the complete message has been encrypted/decrypted before checking the result against the reference model.
The scoreboard has a step through mode where the scoring is done after each 128bit block. This setting is only available when using the C-model as reference and is controlled with a knob.
tb/aes_bind.sv
binds the tlul_assert
assertions to the IP to ensure TileLink interface protocol compliance.We are using our in-house developed regression tool for both building and running our tests and regressions. Please take a look at the link for detailed information on the usage, capabilities, features and known issues. Here's how to run a smoke test:
$ $REPO_TOP/util/dvsim/dvsim.py $REPO_TOP/hw/ip/aes/dv/aes_sim_cfg.hjson -i aes_smoke
Here's how to run a basic test without DPI calls:
$ $REPO_TOP/util/dvsim/dvsim.py $REPO_TOP/hw/ip/aes/dv/aes_${VARIANT}_sim_cfg.hjson -i aes_wakeup
In this run command, $VARIANT can be masked
or unmasked
.