tree 1e4f2888e30957230d9a6e0b9df0f10b0b8613ab
parent 531b2631ca469182fb98f563e3b32f2ffffde0d5
author Timothy Chen <timothytim@google.com> 1570229831 -0700
committer tjaychen <timothytim@google.com> 1571114664 -0700

[topgen] Handle multi clock ports in topgen/module/xbar

Construction is very similar to reset support.
Each target is defined with a clock_connection that is used to
connect in top_*.sv

Inside validate.py, validate_clock / validate_reset are currently
very similar, but is expected to diverge in the future/

Related to #346