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opentitan
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71261a0cd22b7f29bf7e729661b44f58897168c4
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hw
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ip
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prim
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lint
tree: f67a152a58a50b3136de28d4d109802f450f6831 [
path history
]
[
tgz
]
prim.vlt
prim.waiver
prim_and2.waiver
prim_arbiter.vlt
prim_arbiter.waiver
prim_assert.vlt
prim_assert.waiver
prim_buf.waiver
prim_cdc_rand_delay.vlt
prim_cdc_rand_delay.waiver
prim_cipher.vlt
prim_cipher_pkg.waiver
prim_clock_buf.waiver
prim_clock_div.waiver
prim_clock_gating.waiver
prim_clock_inv.waiver
prim_clock_mux2.waiver
prim_count.vlt
prim_count.waiver
prim_crc32.vlt
prim_double_lfsr.vlt
prim_double_lfsr.waiver
prim_fifo.vlt
prim_fifo.waiver
prim_flash.waiver
prim_flop.waiver
prim_flop_2sync.waiver
prim_flop_en.waiver
prim_lc_sender.waiver
prim_lfsr.waiver
prim_max_tree.vlt
prim_max_tree.waiver
prim_mubi.waiver
prim_onehot_check.vlt
prim_onehot_check.waiver
prim_onehot_mux.waiver
prim_otp.waiver
prim_pad_attr.waiver
prim_pad_wrapper.waiver
prim_ram_1p.waiver
prim_ram_1p_adv.waiver
prim_ram_1p_scr.vlt
prim_ram_2p.waiver
prim_reg_we_check.waiver
prim_rom.waiver
prim_rst_sync.waiver
prim_secded.waiver
prim_sparse_fsm_flop.vlt
prim_sparse_fsm_flop.waiver
prim_subreg.vlt
prim_subreg.waiver
prim_sum_tree.vlt
prim_sum_tree.waiver
prim_usb_diff_rx.waiver
prim_xnor2.waiver
prim_xor2.waiver
prim_xoshiro256pp.vlt