blob: 658991345d1828e9dd6ab904ce44ddb3ec5f32fa [file] [log] [blame]
CAPI=2:
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:ip:otbn_top_sim:0.1"
description: "Standalone OpenTitan Big Number Accelerator (OTBN) simulation"
filesets:
files_otbn:
depend:
- lowrisc:ip:otbn
- lowrisc:dv:otbn_model
- lowrisc:ip:otbn_tracer
- lowrisc:ip:keymgr_pkg
files_verilator:
depend:
- lowrisc:dv:otbn_memutil
- lowrisc:dv_verilator:memutil_verilator
- lowrisc:dv_verilator:simutil_verilator
files:
- otbn_top_sim.cc: { file_type: cppSource }
- otbn_top_sim.sv: { file_type: systemVerilogSource }
- otbn_mock_edn.sv: { file_type: systemVerilogSource }
files_verilator_waiver:
files:
- otbn_top_sim_waivers.vlt
file_type: vlt
targets:
default: &default_target
filesets:
- files_verilator_waiver
- files_otbn
- files_verilator
toplevel: otbn_top_sim
lint:
<<: *default_target
default_tool: verilator
tools:
verilator:
mode: lint-only
verilator_options:
- "-Wall"
# RAM primitives wider than 64bit (required for ECC) fail to build in
# Verilator without increasing the unroll count (see Verilator#1266)
- "--unroll-count 72"
sim:
<<: *default_target
default_tool: verilator
tools:
vcs:
vcs_options:
- '-xlrm uniq_prior_final'
- '-debug_access+r'
verilator:
mode: cc
verilator_options:
# Disabling tracing reduces compile times but doesn't have a
# huge influence on runtime performance.
- '--trace'
- '--trace-fst' # this requires -DVM_TRACE_FMT_FST in CFLAGS below!
- '--trace-structs'
- '--trace-params'
- '--trace-max-array 1024'
- '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=otbn_top_sim"'
- '-LDFLAGS "-pthread -lutil -lelf"'
- "-Wall"
# RAM primitives wider than 64bit (required for ECC) fail to build in
# Verilator without increasing the unroll count (see Verilator#1266)
- "--unroll-count 72"