diff --git a/hw/ip/otbn/lint/otbn.vlt b/hw/ip/otbn/lint/otbn.vlt
index dabd103..6f877a3 100644
--- a/hw/ip/otbn/lint/otbn.vlt
+++ b/hw/ip/otbn/lint/otbn.vlt
@@ -4,10 +4,8 @@
 
 `verilator_config
 
-// Temporary rule to turn off all unused warnings until implementation is more
-// complete
-lint_off -rule UNUSED -file "*/rtl/otbn_*"
-
 // Operator EQ expects 32 bits on the LHS, but LHS's VARREF 'addr' generates 3
 // bits.
 lint_off -rule WIDTH -file "*/rtl/otbn_lsu.sv" -match "*'addr' generates 3 bits*"
+
+lint_off -rule UNUSED -file "*/rtl/otbn_decoder.sv" -match "Bits of signal are not used: 'insn_alu'[24:15,11:7]"
diff --git a/hw/ip/otbn/rtl/otbn_alu_base.sv b/hw/ip/otbn/rtl/otbn_alu_base.sv
index 3cb12c7..6bdeb4c 100644
--- a/hw/ip/otbn/rtl/otbn_alu_base.sv
+++ b/hw/ip/otbn/rtl/otbn_alu_base.sv
@@ -25,7 +25,7 @@
 
   logic [32:0] adder_op_a, adder_op_b;
   logic        adder_op_b_negate;
-  logic [33:0] adder_result;
+  logic [32:0] adder_result;
 
   logic [31:0] and_result;
   logic [31:0] or_result;
@@ -112,4 +112,22 @@
   assign is_equal = comparison_i.operand_a == comparison_i.operand_b;
 
   assign comparison_result_o = (comparison_i.op == ComparisonOpBaseEq) ? is_equal : ~is_equal;
+
+  // The bottom bit of adder_result is discarded. It simply corresponds to the carry in used to produce
+  // twos completement subtraction from an addition.
+  logic unused_adder_result_bit;
+
+  // The top bit of shift_out is discarded. shift_in contains an extra bit to deal with sign
+  // extension which isn't needed in the shift_out result.
+  logic unused_shift_out_result_bit;
+  assign unused_shift_out_result_bit = shift_out[32];
+
+  assign unused_adder_result_bit = adder_result[0];
+
+  // clk_i, rst_ni are only used by assertions
+  logic unused_clk;
+  logic unused_rst_n;
+
+  assign unused_clk = clk_i;
+  assign unused_rst_n = rst_ni;
 endmodule
diff --git a/hw/ip/otbn/rtl/otbn_controller.sv b/hw/ip/otbn/rtl/otbn_controller.sv
index 3ea2bed..120ad33 100644
--- a/hw/ip/otbn/rtl/otbn_controller.sv
+++ b/hw/ip/otbn/rtl/otbn_controller.sv
@@ -526,4 +526,17 @@
   assign lsu_addr_o         = alu_base_operation_result_i[DmemAddrWidth-1:0];
   assign lsu_base_wdata_o   = rf_base_rd_data_b_i;
   assign lsu_bignum_wdata_o = rf_bignum_rd_data_b_i;
+
+  // RF Read enables for bignum RF are unused for now. Future security hardening work may make use
+  // of them.
+  logic unused_rf_ren_a_bignum;
+  logic unused_rf_ren_b_bignum;
+
+  assign unused_rf_ren_a_bignum = insn_dec_bignum_i.rf_ren_a;
+  assign unused_rf_ren_b_bignum = insn_dec_bignum_i.rf_ren_b;
+
+  // TODO: Implement error handling
+  logic [1:0] unused_lsu_rdata_err;
+  assign unused_lsu_rdata_err = lsu_rdata_err_i;
+
 endmodule
diff --git a/hw/ip/otbn/rtl/otbn_core.sv b/hw/ip/otbn/rtl/otbn_core.sv
index d7a560d..2542c83 100644
--- a/hw/ip/otbn/rtl/otbn_core.sv
+++ b/hw/ip/otbn/rtl/otbn_core.sv
@@ -387,4 +387,9 @@
     .ispr_acc_wr_en_i   (ispr_acc_wr_en)
   );
 
+  logic unused_insn_illegal;
+
+  // TODO: Implement error handling
+  assign unused_insn_illegal = insn_illegal;
+
 endmodule
diff --git a/hw/ip/otbn/rtl/otbn_decoder.sv b/hw/ip/otbn/rtl/otbn_decoder.sv
index 07c5790..d5f108b 100644
--- a/hw/ip/otbn/rtl/otbn_decoder.sv
+++ b/hw/ip/otbn/rtl/otbn_decoder.sv
@@ -899,6 +899,13 @@
 
   end
 
+  // clk_i and rst_ni are only used by assertions
+  logic unused_clk;
+  logic unused_rst_n;
+
+  assign unused_clk = clk_i;
+  assign unused_rst_n = rst_ni;
+
   ////////////////
   // Assertions //
   ////////////////
diff --git a/hw/ip/otbn/rtl/otbn_instruction_fetch.sv b/hw/ip/otbn/rtl/otbn_instruction_fetch.sv
index e2c9720..6e475c5 100644
--- a/hw/ip/otbn/rtl/otbn_instruction_fetch.sv
+++ b/hw/ip/otbn/rtl/otbn_instruction_fetch.sv
@@ -48,5 +48,11 @@
 
   // TODO: Need to handle imem_rerror somewhere, which need to be turned into alerts. Could be
   // handled either here or somewhere more up in the hierarchy.
+  logic [1:0] unused_imem_rerror;
+  assign unused_imem_rerror = imem_rerror_i;
 
+  // Nothing is reset in this module so rst_ni is unused. Leaving it in so adding resettable flops
+  // (or an assertion which will use the reset) is straight forward.
+  logic unused_rst_n;
+  assign unused_rst_n = rst_ni;
 endmodule
diff --git a/hw/ip/otbn/rtl/otbn_loop_controller.sv b/hw/ip/otbn/rtl/otbn_loop_controller.sv
index 301ef59..52b58a2 100644
--- a/hw/ip/otbn/rtl/otbn_loop_controller.sv
+++ b/hw/ip/otbn/rtl/otbn_loop_controller.sv
@@ -58,7 +58,16 @@
 
   // Determine end address of incoming loop from LOOP instruction (valid on loop_start_i and
   // specified by loop_bodysize_i and loop_iterations_i).
-  assign new_loop_end_addr = insn_addr_i + {loop_bodysize_i[ImemAddrWidth-3:0], 2'b00};
+  if (ImemAddrWidth < 14) begin : g_new_loop_end_addr_small_imem
+    assign new_loop_end_addr = insn_addr_i + {loop_bodysize_i[ImemAddrWidth-3:0], 2'b00};
+
+    // ISA has a fixed 12 bits for loop_bodysize. When IMEM size is less than 16 kB (ImemAddrWidth
+    // < 14) some of these bits are ignored as a loop body cannot be greater than the IMEM size.
+    logic [11:ImemAddrWidth-2] unused_loop_bodysize_bits;
+    assign unused_loop_bodysize_bits = loop_bodysize_i[11:ImemAddrWidth-2];
+  end else begin : g_new_loop_end_addr_big_imem
+    assign new_loop_end_addr = insn_addr_i + {loop_bodysize_i, 2'b00};
+  end
 
   assign new_loop = '{
     loop_start: next_insn_addr_i,
@@ -140,4 +149,8 @@
     .top_data_o  (next_loop),
     .top_valid_o (next_loop_valid)
   );
+
+  // TODO: deal with loop stack overflow
+  logic unused_loop_stack_full;
+  assign unused_loop_stack_full = loop_stack_full;
 endmodule
diff --git a/hw/ip/otbn/rtl/otbn_lsu.sv b/hw/ip/otbn/rtl/otbn_lsu.sv
index e7d2f81..c495fea 100644
--- a/hw/ip/otbn/rtl/otbn_lsu.sv
+++ b/hw/ip/otbn/rtl/otbn_lsu.sv
@@ -98,7 +98,20 @@
   `ASSERT(LsuLoadAddrStable, lsu_load_req_i |=> $stable(lsu_addr_i));
   `ASSERT_KNOWN_IF(LsuAddrKnown, lsu_addr_i, lsu_load_req_i | lsu_store_req_i);
 
+  // TODO: Produce an error/alert if this doesn't hold?
+  `ASSERT(DMemRValidAfterReq, dmem_req_o & ~dmem_write_o |=> dmem_rvalid_i);
+
   assign lsu_bignum_rdata_o = dmem_rdata_i;
   assign lsu_rdata_err_o    = dmem_rerror_i;
 
+  // clk_i, rst_ni and dmem_rvalid_i are only used by assertions
+  logic unused_clk;
+  logic unused_rst_n;
+  logic unused_dmem_rvalid;
+
+  assign unused_clk = clk_i;
+  assign unused_rst_n = rst_ni;
+  assign unused_dmem_rvalid = dmem_rvalid_i;
+
+
 endmodule
diff --git a/hw/ip/otbn/rtl/otbn_stack.sv b/hw/ip/otbn/rtl/otbn_stack.sv
index edbcb5a..255fd0c 100644
--- a/hw/ip/otbn/rtl/otbn_stack.sv
+++ b/hw/ip/otbn/rtl/otbn_stack.sv
@@ -38,7 +38,6 @@
   logic [StackWidth-1:0]  stack_storage [StackDepth];
   logic [StackDepthW:0]   stack_wr_ptr_q, stack_wr_ptr_d;
   logic [StackDepthW-1:0] stack_rd_ptr;
-  logic                   stack_wr_en;
 
   logic stack_empty;
   logic stack_full;