tree b3e88355d59e77062f5b8bd039b5445bfac3d117
parent e19e99ff6a3ce92921453d2a79cdd32aa2921caf
author Philipp Wagner <phw@lowrisc.org> 1583942582 +0000
committer Philipp Wagner <mail@philipp-wagner.com> 1584018470 +0000

[rv_plic] Import package only once

The rv_plic template imported the rv_plic_reg_pkg once in the header and
once in the body; remove the import in the body to avoid a NOTE from
VCS during regression runs.

Regenerated SystemVerilog files after changes to the template.

```
Parsing design file '../src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic.sv'

Note-[SV-LCM-PPWI] Package previously wildcard imported
../src/lowrisc_top_earlgrey_rv_plic_0.1/rtl/autogen/rv_plic.sv, 46
rv_plic
  Package 'rv_plic_reg_pkg' already wildcard imported.
  Ignoring rv_plic_reg_pkg::*
  See the SystemVerilog LRM(1800-2005), section 19.2.1.
```

Signed-off-by: Philipp Wagner <phw@lowrisc.org>