)]}'
{
  "commit": "612901baf741e716f50bdaaf65df89295472a708",
  "tree": "3c1a6010a0ad94d34dde2f1db564e1f87b4f7dca",
  "parents": [
    "891ab8fad26d93879e85d04b7be5b0ec7628b2dc"
  ],
  "author": {
    "name": "Timothy Chen",
    "email": "timothytim@google.com",
    "time": "Thu Mar 05 17:03:13 2020 -0800"
  },
  "committer": {
    "name": "tjaychen",
    "email": "timothytim@google.com",
    "time": "Fri Apr 17 16:22:18 2020 -0700"
  },
  "message": "[rstmgr] First draft of reset manager\n\nFirst draft of reset manager.\n\nThis module is mostly inert without an associated clock and power manager.\nIt is also not integrated yet, as it is dependent on the pwrmgr.\n\nSigned-off-by: Timothy Chen \u003ctimothytim@google.com\u003e\n\n[rstmgr] - Various clean-up from comments\n\n- clean up naming\n- clarified info recording cause\n\nSigned-off-by: Timothy Chen \u003ctimothytim@google.com\u003e\n",
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