)]}'
{
  "commit": "5f0da061d648403ee178ddcdde1a94704cc1c9a1",
  "tree": "5f573cd866dc202813f4ee934adea2b0b66d251d",
  "parents": [
    "a9f0fc4cf884d233e29e4574260741730d67cb91"
  ],
  "author": {
    "name": "Srikrishna Iyer",
    "email": "sriyer@google.com",
    "time": "Thu Jun 03 13:52:02 2021 -0700"
  },
  "committer": {
    "name": "Srikrishna Iyer",
    "email": "46467186+sriyerg@users.noreply.github.com",
    "time": "Wed Jun 09 12:44:06 2021 -0700"
  },
  "message": "[chip, testplan] Update chip testplan\n\n- This commit addresses the comments and updates from the testplan\nreview meeting held on 6/03/2021.\n- The meeting notes are below:\nhttps://docs.google.com/document/d/1OhPP-HjciwKpIh0wWt1xqPqPf0Y0powmmww6xekwMeE/\n- Updated SPI host, I2c, pwm and pattgen sections of the testplan\n\nSigned-off-by: Srikrishna Iyer \u003csriyer@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5a0c48e3e5b6a84f295cb0729336f8494154ad52",
      "old_mode": 33188,
      "old_path": "hw/top_earlgrey/data/chip_testplan.hjson",
      "new_id": "46583112fe9582e588457d757731651eebb7aae5",
      "new_mode": 33188,
      "new_path": "hw/top_earlgrey/data/chip_testplan.hjson"
    }
  ]
}