diff --git a/hw/dv/sv/cip_lib/cip_base_env_cov.sv b/hw/dv/sv/cip_lib/cip_base_env_cov.sv
index ca02b55..20e75e3 100644
--- a/hw/dv/sv/cip_lib/cip_base_env_cov.sv
+++ b/hw/dv/sv/cip_lib/cip_base_env_cov.sv
@@ -5,9 +5,9 @@
 // put these covergoups outside the class in order to create them anywhere after get cfg object
 // if more than one interrupt/alert registers, these can be reused
 // in extended cov class, better to have the covergroup inside the class and create in new function
-covergroup intr_covergroup (uint num_interrupts) with function sample(uint intr,
-                                                                      bit intr_en,
-                                                                      bit intr_state);
+covergroup intr_cg (uint num_interrupts) with function sample(uint intr,
+                                                              bit intr_en,
+                                                              bit intr_state);
   cp_intr: coverpoint intr {
     bins all_values[] = {[0:num_interrupts-1]};
   }
@@ -16,10 +16,10 @@
   cross cp_intr, cp_intr_en, cp_intr_state;
 endgroup
 
-covergroup intr_test_covergroup (uint num_interrupts) with function sample(uint intr,
-                                                                           bit intr_test,
-                                                                           bit intr_en,
-                                                                           bit intr_state);
+covergroup intr_test_cg (uint num_interrupts) with function sample(uint intr,
+                                                                   bit intr_test,
+                                                                   bit intr_en,
+                                                                   bit intr_state);
   cp_intr: coverpoint intr {
     bins all_values[] = {[0:num_interrupts-1]};
   }
@@ -34,7 +34,7 @@
   }
 endgroup
 
-covergroup intr_pins_covergroup (uint num_interrupts) with function sample(uint intr_pin, bit intr_pin_value);
+covergroup intr_pins_cg (uint num_interrupts) with function sample(uint intr_pin, bit intr_pin_value);
   cp_intr_pin: coverpoint intr_pin {
     bins all_pins[] = {[0:num_interrupts-1]};
   }
@@ -45,7 +45,7 @@
   cp_intr_pins_all_values: cross cp_intr_pin, cp_intr_pin_value;
 endgroup
 
-covergroup alert_covergroup (uint num_alerts) with function sample(uint alert);
+covergroup alert_cg (uint num_alerts) with function sample(uint alert);
   cp_alert: coverpoint alert {
     bins all_values[] = {[0:num_alerts-1]};
   }
@@ -54,10 +54,14 @@
 class cip_base_env_cov #(type CFG_T = cip_base_env_cfg) extends dv_base_env_cov #(CFG_T);
   `uvm_component_param_utils(cip_base_env_cov #(CFG_T))
 
-  intr_covergroup      intr_cg;
-  intr_test_covergroup intr_test_cg;
-  intr_pins_covergroup intr_pins_cg;
-  alert_covergroup     alert_cg;
+  intr_cg        intr_cg;
+  intr_test_cg   intr_test_cg;
+  intr_pins_cg   intr_pins_cg;
+  alert_cg       alert_cg;
+  // Coverage for sticky interrupt functionality described in CIP specification
+  // As some interrupts are non-sticky, this covergroup should be populated on "as and when needed" basis
+  // in extended <ip>_env_cov class for interrupt types that are sticky
+  dv_base_generic_cov_obj sticky_intr_cov[string];
 
   `uvm_component_new
 
diff --git a/hw/dv/sv/common_ifs/pins_if.sv b/hw/dv/sv/common_ifs/pins_if.sv
index 414cf8b..2907926 100644
--- a/hw/dv/sv/common_ifs/pins_if.sv
+++ b/hw/dv/sv/common_ifs/pins_if.sv
@@ -75,7 +75,14 @@
     for (genvar i = 0; i < Width; i++) begin : each_pin
       assign pins_int[i] = pins_pd[i] ? 1'b0 :
                            pins_pu[i] ? 1'b1 : 1'bz;
-      assign (pull0, pull1) pins[i] = pins_oe[i] ? pins_o[i] : pins_int[i];
+      // If output enable is 1, strong driver assigns pin to 'value to be driven out';
+      // the external strong driver can still affect pin, if exists.
+      // Else if output enable is 0, weak pullup or pulldown is applied to pin.
+      // By doing this, we make sure that weak pullup or pulldown does not override
+      // any 'x' value on pin, that may result due to conflicting values
+      // between 'value to be driven out' and the external driver's value.
+      assign pins[i] = pins_oe[i] ? pins_o[i] : 1'bz;
+      assign (pull0, pull1) pins[i] = ~pins_oe[i] ? pins_int[i] : 1'bz;
     end
   endgenerate
 
diff --git a/hw/dv/sv/dv_lib/dv_base_env_cov.sv b/hw/dv/sv/dv_lib/dv_base_env_cov.sv
index bdcfd5e..d593462 100644
--- a/hw/dv/sv/dv_lib/dv_base_env_cov.sv
+++ b/hw/dv/sv/dv_lib/dv_base_env_cov.sv
@@ -5,25 +5,24 @@
 // TODO - We are enclosing generic covergroups inside class so that we can
 // take avoid tool limitation of not allowing arrays of covergroup
 // Refer to Issue#375 for more details
-class dv_base_generic_cov_obj extends uvm_object;
-  `uvm_object_utils(dv_base_generic_cov_obj)
+class dv_base_generic_cov_obj;
 
   // Covergroup: bit_toggle_cg
   // Generic covergroup definition
-  covergroup bit_toggle_cg(string name) with function sample(bit value);
+  covergroup bit_toggle_cg(string name, bit toggle_cov_en = 1) with function sample(bit value);
     option.per_instance = 1;
     option.name = name;
     cp_value: coverpoint value;
     cp_transitions: coverpoint value {
+      option.weight = toggle_cov_en;
       bins rising  = (0 => 1);
       bins falling = (1 => 0);
     }
   endgroup : bit_toggle_cg
 
   // Function: new
-  function new(string name="dv_base_generic_cov_obj");
-    super.new(name);
-    bit_toggle_cg = new(name);
+  function new(string name = "dv_base_generic_cov_obj", bit toggle_cov_en = 1);
+    bit_toggle_cg = new(name, toggle_cov_en);
   endfunction : new
 
   // Function: sample
diff --git a/hw/dv/sv/dv_utils/dv_macros.svh b/hw/dv/sv/dv_utils/dv_macros.svh
index 0000a30..d2e5b47 100644
--- a/hw/dv/sv/dv_utils/dv_macros.svh
+++ b/hw/dv/sv/dv_utils/dv_macros.svh
@@ -184,7 +184,7 @@
 
 // Shorthand for common std::randomize(foo) with { } + fatal check
 `ifndef DV_CHECK_STD_RANDOMIZE_WITH_FATAL
-  `define DV_CHECK_STD_RANDOMIZE_WITH_FATAL(VAR_, WITH_C_,MSG_="Randomization failed!",ID_=`gfn) \
+  `define DV_CHECK_STD_RANDOMIZE_WITH_FATAL(VAR_, WITH_C_, MSG_="Randomization failed!",ID_=`gfn) \
     `DV_CHECK_FATAL(std::randomize(VAR_) with {WITH_C_}, MSG_, ID_)
 `endif
 
diff --git a/hw/dv/sv/mem_model/mem_model.sv b/hw/dv/sv/mem_model/mem_model.sv
index 8f4c4cd..18005b1 100644
--- a/hw/dv/sv/mem_model/mem_model.sv
+++ b/hw/dv/sv/mem_model/mem_model.sv
@@ -24,7 +24,7 @@
                 $sformatf("Read Mem  : Addr[0x%0h], Data[0x%0h]", addr, data), UVM_HIGH)
     end
     else begin
-      std::randomize(data);
+      `DV_CHECK_STD_RANDOMIZE_FATAL(data)
       `uvm_error(get_full_name(), $sformatf("read to uninitialzed addr 0x%0h", addr))
     end
     return data;
diff --git a/hw/ip/gpio/dv/env/gpio_env_cov.sv b/hw/ip/gpio/dv/env/gpio_env_cov.sv
index f26cc99..a77b1cc 100644
--- a/hw/ip/gpio/dv/env/gpio_env_cov.sv
+++ b/hw/ip/gpio/dv/env/gpio_env_cov.sv
@@ -29,12 +29,12 @@
   endfunction : new
 endclass : gpio_intr_type_cov_obj
 
-class gpio_two_vars_generic_cov_obj extends uvm_object;
-  `uvm_object_utils(gpio_two_vars_generic_cov_obj)
+class gpio_out_oe_cov_obj extends uvm_object;
+  `uvm_object_utils(gpio_out_oe_cov_obj)
 
   // Covergroup: var1_var2_cg
-  // Generic covergroup that samples two bit variables and
-  // looks for their individual coverage as well as cross coverage.
+  // Covergroup invovling two variables of bit type and are meant to
+  // be used for cross coverage related to *out* and *oe* registers
   covergroup var1_var2_cg(string name) with function sample(bit var1, bit var2);
     option.per_instance = 1;
     option.name = name;
@@ -44,11 +44,11 @@
   endgroup : var1_var2_cg
 
   // Function: new
-  function new(string name="gpio_two_vars_generic_cov_obj");
+  function new(string name="gpio_out_oe_cov_obj");
     super.new(name);
     var1_var2_cg = new(name);
   endfunction : new
-endclass : gpio_two_vars_generic_cov_obj
+endclass : gpio_out_oe_cov_obj
 
 class gpio_env_cov extends cip_base_env_cov #(.CFG_T(gpio_env_cfg));
   `uvm_component_utils(gpio_env_cov)
@@ -59,17 +59,38 @@
   dv_base_generic_cov_obj intr_state_cov_obj[NUM_GPIOS];
   // Interrupt Control Enable registers' values
   dv_base_generic_cov_obj intr_ctrl_en_cov_objs[NUM_GPIOS][string];
-  // Different gpio interrupt types' occurrences
-  gpio_intr_type_cov_obj intr_event_type_cov_objs[NUM_GPIOS][string];
-  // Per bit coverage on *out* and *oe* registers
-  dv_base_generic_cov_obj out_oe_cov_objs[NUM_GPIOS][string];
-
-  // Coverage on data and mask fields of masked* registers
-  gpio_two_vars_generic_cov_obj out_oe_mask_data_cov_objs[NUM_GPIOS/2][string];
-  // Coverage on effective values of DATA_OUT and DATA_OE
-  gpio_two_vars_generic_cov_obj data_out_data_oe_cov_obj[NUM_GPIOS];
   // data_in register per bit value coverage
   dv_base_generic_cov_obj data_in_cov_obj[NUM_GPIOS];
+  // Per bit coverage on *out* and *oe* registers
+  dv_base_generic_cov_obj out_oe_cov_objs[NUM_GPIOS][string];
+  // Different gpio interrupt types' occurrences
+  gpio_intr_type_cov_obj intr_event_type_cov_objs[NUM_GPIOS][string];
+  // Coverage on data and mask fields of masked* registers
+  gpio_out_oe_cov_obj out_oe_mask_data_cov_objs[NUM_GPIOS/2][string];
+  // Coverage on effective values of DATA_OUT and DATA_OE
+  gpio_out_oe_cov_obj data_out_data_oe_cov_obj[NUM_GPIOS];
+  // Cross Coverage between per pin values of data_out value, data_oe value
+  // and data_in value
+  covergroup data_out_data_oe_data_in_cross_cg(string name) with function sample(uint pin,
+                                                                                 bit data_out,
+                                                                                 bit data_oe,
+                                                                                 bit data_in);
+    option.name = name;
+    cp_pin: coverpoint pin {
+      bins bins_for_gpio_bits[] = {[0:NUM_GPIOS-1]};
+    }
+    cp_cross_all: cross cp_pin, data_out, data_oe, data_in;
+  endgroup : data_out_data_oe_data_in_cross_cg
+  // Cross coverage between gpio pin value and effective data_in value
+  covergroup gpio_pins_data_in_cross_cg(string name) with function sample(uint pin,
+                                                                          bit gpio_value,
+                                                                          bit data_in);
+    option.name = name;
+    cp_pin: coverpoint pin {
+      bins bins_for_gpio_bits[] = {[0:NUM_GPIOS-1]};
+    }
+    cp_cross_pins_data_in: cross cp_pin, gpio_value, data_in;
+  endgroup : gpio_pins_data_in_cross_cg
 
   function new(string name, uvm_component parent);
     super.new(name, parent);
@@ -104,6 +125,10 @@
         data_out_data_oe_cov_obj[each_pin] = new($sformatf("data_out_data_oe_cov_obj_pin%0d",
                                                            each_pin));
         data_in_cov_obj[each_pin] = new($sformatf("data_in_cov_obj_pin%0d", each_pin));
+        // Create sticky interrupt coverage per pin
+        // No toggle coverage is required in this case, so specify toggle_cov_en = 0
+        sticky_intr_cov[{"gpio_sticky_intr_pin", $sformatf("%0d", each_pin)}] =
+            new(.name({"gpio_sticky_intr_pin", $sformatf("%0d", each_pin)}), .toggle_cov_en(0));
       end
       // Per pin coverage and cross coverage for mask and data
       // fields within masked_* registers
@@ -115,6 +140,8 @@
           end
         end
       end
+      data_out_data_oe_data_in_cross_cg = new("data_out_data_oe_data_in_cross_cg");
+      gpio_pins_data_in_cross_cg = new("gpio_pins_data_in_cross_cg");
     end
   endfunction : new
 
diff --git a/hw/ip/gpio/dv/env/gpio_scoreboard.sv b/hw/ip/gpio/dv/env/gpio_scoreboard.sv
index da1f1f7..f296478 100644
--- a/hw/ip/gpio/dv/env/gpio_scoreboard.sv
+++ b/hw/ip/gpio/dv/env/gpio_scoreboard.sv
@@ -27,6 +27,10 @@
   bit [TL_DW-1:0] last_intr_update_except_clearing;
   // Value seen in last Interrupt Test write
   bit [TL_DW-1:0] last_intr_test_event;
+  // Flag to:
+  //  (i) indicate that write to INTR_STATE register just happened, and
+  // (ii) store information of which all interupt bits were cleared
+  bit [TL_DW-1:0] cleared_intr_bits;
 
   `uvm_component_utils(gpio_scoreboard)
 
@@ -110,6 +114,7 @@
           `uvm_info(`gfn, $sformatf("Write on intr_state: write data = %0h", item.a_data), UVM_HIGH)
           if (intr_state_update_queue.size() > 0) begin
             gpio_reg_update_due_t intr_state_write_to_clear_update = intr_state_update_queue[$];
+            `uvm_info(`gfn, $sformatf("Entry taken out for clearing is %0p", intr_state_write_to_clear_update), UVM_HIGH)
             // Update time
             intr_state_write_to_clear_update.eval_time = $time;
             for (uint each_bit = 0; each_bit < TL_DW; each_bit++) begin
@@ -117,6 +122,7 @@
                   intr_state_write_to_clear_update.reg_value[each_bit] == 1'b1 &&
                   item.a_data[each_bit] == 1'b1) begin
                 intr_state_write_to_clear_update.reg_value[each_bit] = 1'b0;
+                cleared_intr_bits[each_bit] = 1'b1;
                 // Coverage Sampling: gpio interrupt cleared
                 if (cfg.en_cov) begin
                   cov.intr_state_cov_obj[each_bit].sample(1'b0);
@@ -132,6 +138,23 @@
               intr_state_write_to_clear_update.reg_value |= last_intr_update_except_clearing;
               // Delete last entry with same time stamp
               intr_state_update_queue.delete(intr_state_update_queue.size()-1);
+              // Coverage Sampling: cover a scenario wherein cleared interrupt state bit
+              // is re-asserted due to still active interrupt event
+              // Note: In this case, both interrupt clearing event and INTR_STATE reg write
+              // have occurred at the same time.
+              if (cfg.en_cov) begin
+                foreach (cleared_intr_bits[each_bit]) begin
+                  if (cleared_intr_bits[each_bit]) begin
+                    if (last_intr_update_except_clearing[each_bit]) begin
+                      cov.sticky_intr_cov[{"gpio_sticky_intr_pin",
+                                          $sformatf("%0d", each_bit)}].sample(1'b1);
+                    end else begin
+                      cov.sticky_intr_cov[{"gpio_sticky_intr_pin",
+                                          $sformatf("%0d", each_bit)}].sample(1'b0);
+                    end
+                  end
+                end
+              end
             end
             // Push new interrupt state update entry into queue
             intr_state_update_queue.push_back(intr_state_write_to_clear_update);
@@ -460,14 +483,11 @@
       for (uint pin_num = 0; pin_num < NUM_GPIOS; pin_num++) begin
         if (data_out_effect_on_gpio_i[pin_num] === 1'bz) begin
           pred_val_gpio_pins[pin_num] = gpio_i_driven[pin_num];
-        end
-        else if (gpio_i_driven[pin_num] === 1'bz) begin
+        end else if (gpio_i_driven[pin_num] === 1'bz) begin
           pred_val_gpio_pins[pin_num] = data_out_effect_on_gpio_i[pin_num];
-        end
-        else if (data_out_effect_on_gpio_i[pin_num] === gpio_i_driven[pin_num]) begin
+        end else if (data_out_effect_on_gpio_i[pin_num] === gpio_i_driven[pin_num]) begin
           pred_val_gpio_pins[pin_num] = data_out_effect_on_gpio_i[pin_num];
-        end
-        else begin
+        end else begin
           pred_val_gpio_pins[pin_num] = 1'bx;
         end
         if (pred_val_gpio_pins[pin_num] === 1'bz) begin
@@ -492,9 +512,15 @@
         current_data_in_update.eval_time = $time;
         data_in_update_queue.push_back(current_data_in_update);
         // Coverage Sampling: data_in register coverage
+        // Coverage Sampling: Cross coverage between data_out, data_oe and data_in
+        // values per bit
         if (cfg.en_cov) begin
           for (uint each_bit = 0; each_bit < NUM_GPIOS; each_bit++) begin
             cov.data_in_cov_obj[each_bit].sample(pred_val_gpio_pins[each_bit]);
+            cov.data_out_data_oe_data_in_cross_cg.sample(each_bit, data_out[each_bit],
+                data_oe[each_bit], pred_val_gpio_pins[each_bit]);
+            cov.gpio_pins_data_in_cross_cg.sample(each_bit, cfg.gpio_vif.pins[each_bit],
+                pred_val_gpio_pins[each_bit]);
           end
         end
       end
@@ -518,7 +544,7 @@
   // This function computes expected value of gpio intr_status based on
   // changes of gpio_i data or interrupt control registers
   virtual function void gpio_interrupt_predict(
-    input gpio_transition_t [NUM_GPIOS-1:0] gpio_i_transition = {NUM_GPIOS{2'b00}});
+      input gpio_transition_t [NUM_GPIOS-1:0] gpio_i_transition = {NUM_GPIOS{2'b00}});
 
     string msg_id = {`gfn, $sformatf(" gpio_interrupt_predict: ")};
     bit [TL_DW-1:0] intr_enable          = ral.intr_enable.get_mirrored_value();
@@ -632,12 +658,24 @@
     end
     // 3. Apply effect of "Interrupt Test"
     exp_intr_status |= last_intr_test_event;
+    `uvm_info(`gfn, $sformatf("updated intr_state is %0h", exp_intr_status), UVM_HIGH)
     // Coverage Sampling: Coverage on Interrupt Index, Interrupt Enable,
     // Interrupt Status and their cross coverage
     if (cfg.en_cov) begin
       foreach (exp_intr_status[each_bit]) begin
         cov.intr_cg.sample(each_bit, intr_enable[each_bit], exp_intr_status[each_bit]);
         cov.intr_state_cov_obj[each_bit].sample(last_intr_update_except_clearing[each_bit]);
+        // Coverage Sampling: cover a scenario wherein cleared interrupt state bit
+        // is re-asserted due to still active interrupt event
+        if (cleared_intr_bits[each_bit]) begin
+          if (exp_intr_status[each_bit]) begin
+            cov.sticky_intr_cov[{"gpio_sticky_intr_pin", $sformatf("%0d", each_bit)}].sample(1'b1);
+          end else begin
+            cov.sticky_intr_cov[{"gpio_sticky_intr_pin", $sformatf("%0d", each_bit)}].sample(1'b0);
+          end
+          // Clear the flag
+          cleared_intr_bits[each_bit] = 1'b0;
+        end
       end
     end
     // Clear last_intr_test_event
diff --git a/hw/ip/gpio/dv/env/seq_lib/gpio_intr_with_filter_rand_intr_event_vseq.sv b/hw/ip/gpio/dv/env/seq_lib/gpio_intr_with_filter_rand_intr_event_vseq.sv
index a672c13..cb57b75 100644
--- a/hw/ip/gpio/dv/env/seq_lib/gpio_intr_with_filter_rand_intr_event_vseq.sv
+++ b/hw/ip/gpio/dv/env/seq_lib/gpio_intr_with_filter_rand_intr_event_vseq.sv
@@ -155,7 +155,7 @@
                   1: csr_rd_check(.ptr(ral.data_in), .compare_value(expected_value_data_in));
                 endcase
               end
-              while(num_cycles_elapsed < (FILTER_CYCLES -2));
+              while (num_cycles_elapsed < (FILTER_CYCLES -2));
             end // csr_rd_and_check
           join // end fork..join
         end // csr_read_and_check
diff --git a/hw/ip/gpio/dv/tb/tb.sv b/hw/ip/gpio/dv/tb/tb.sv
index 8c69319..d23aab3 100644
--- a/hw/ip/gpio/dv/tb/tb.sv
+++ b/hw/ip/gpio/dv/tb/tb.sv
@@ -16,6 +16,7 @@
   `include "dv_macros.svh"
 
   wire clk, rst_n;
+  wire devmode;
   wire [NUM_GPIOS-1:0] gpio_pins;
   wire [NUM_GPIOS-1:0] gpio_i;
   wire [NUM_GPIOS-1:0] gpio_o;
@@ -28,7 +29,7 @@
   clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
   pins_if #(NUM_MAX_INTERRUPTS) intr_if(.pins(interrupts));
   pins_if #(NUM_MAX_ALERTS) alerts_if(.pins(alerts));
-  pins_if #(1) devmode_if();
+  pins_if #(1) devmode_if(.pins(devmode));
   tl_if tl_if(.clk(clk), .rst_n(rst_n));
   pins_if #(NUM_GPIOS) gpio_if(.pins(gpio_pins));
 
diff --git a/hw/ip/hmac/dv/tb/tb.sv b/hw/ip/hmac/dv/tb/tb.sv
index f2ec6ef..d7aff19 100644
--- a/hw/ip/hmac/dv/tb/tb.sv
+++ b/hw/ip/hmac/dv/tb/tb.sv
@@ -15,6 +15,7 @@
   `include "dv_macros.svh"
 
   wire clk, rst_n;
+  wire devmode;
   wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
   wire [NUM_MAX_ALERTS-1:0] alerts;
 
@@ -25,7 +26,7 @@
   clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
   pins_if #(NUM_MAX_INTERRUPTS) intr_if(.pins(interrupts));
   pins_if #(NUM_MAX_ALERTS) alerts_if(.pins(alerts));
-  pins_if #(1) devmode_if();
+  pins_if #(1) devmode_if(devmode);
   tl_if tl_if(.clk(clk), .rst_n(rst_n));
 
   // dut
diff --git a/hw/ip/i2c/dv/tb/tb.sv b/hw/ip/i2c/dv/tb/tb.sv
index ad8490e..6e651a3 100644
--- a/hw/ip/i2c/dv/tb/tb.sv
+++ b/hw/ip/i2c/dv/tb/tb.sv
@@ -14,6 +14,7 @@
   `include "dv_macros.svh"
 
   wire clk, rst_n;
+  wire devmode;
   wire intr_fmt_watermark;
   wire intr_rx_watermark;
   wire intr_fmt_overflow;
@@ -30,7 +31,7 @@
   clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
   pins_if #(NUM_MAX_INTERRUPTS) intr_if(interrupts);
   pins_if #(NUM_MAX_ALERTS) alerts_if(alerts);
-  pins_if #(1) devmode_if();
+  pins_if #(1) devmode_if(devmode);
   tl_if tl_if(.clk(clk), .rst_n(rst_n));
   i2c_if i2c_if();
 
diff --git a/hw/ip/rv_timer/dv/tb/tb.sv b/hw/ip/rv_timer/dv/tb/tb.sv
index 88f22d3..004154d 100644
--- a/hw/ip/rv_timer/dv/tb/tb.sv
+++ b/hw/ip/rv_timer/dv/tb/tb.sv
@@ -15,6 +15,7 @@
   `include "dv_macros.svh"
 
   wire clk, rst_n;
+  wire devmode;
   wire [NUM_HARTS-1:0][NUM_TIMERS-1:0] intr_timer_expired;
   wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
   wire [NUM_MAX_ALERTS-1:0] alerts;
@@ -23,7 +24,7 @@
   clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
   pins_if #(NUM_MAX_INTERRUPTS) intr_if(.pins(interrupts));
   pins_if #(NUM_MAX_ALERTS) alerts_if(.pins(alerts));
-  pins_if #(1) devmode_if();
+  pins_if #(1) devmode_if(devmode);
   tl_if tl_if(.clk(clk), .rst_n(rst_n));
 
   // dut
diff --git a/hw/ip/spi_device/dv/tb/tb.sv b/hw/ip/spi_device/dv/tb/tb.sv
index 978b3f3..6514605 100644
--- a/hw/ip/spi_device/dv/tb/tb.sv
+++ b/hw/ip/spi_device/dv/tb/tb.sv
@@ -15,6 +15,7 @@
   `include "dv_macros.svh"
 
   wire clk, rst_n;
+  wire devmode;
   wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
   wire [NUM_MAX_ALERTS-1:0] alerts;
 
@@ -33,7 +34,7 @@
   clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
   pins_if #(NUM_MAX_INTERRUPTS) intr_if(.pins(interrupts));
   pins_if #(NUM_MAX_ALERTS) alerts_if(.pins(alerts));
-  pins_if #(1) devmode_if();
+  pins_if #(1) devmode_if(devmode);
   tl_if tl_if(.clk(clk), .rst_n(rst_n));
   spi_if spi_if(.rst_n(rst_n));
 
diff --git a/hw/ip/uart/dv/tb/tb.sv b/hw/ip/uart/dv/tb/tb.sv
index 11d05aa..0831894 100644
--- a/hw/ip/uart/dv/tb/tb.sv
+++ b/hw/ip/uart/dv/tb/tb.sv
@@ -15,6 +15,7 @@
   `include "dv_macros.svh"
 
   wire clk, rst_n;
+  wire devmode;
   wire intr_tx_watermark;
   wire intr_rx_watermark;
   wire intr_tx_overflow;
@@ -30,7 +31,7 @@
   clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
   pins_if #(NUM_MAX_INTERRUPTS) intr_if(interrupts);
   pins_if #(NUM_MAX_ALERTS) alerts_if(alerts);
-  pins_if #(1) devmode_if();
+  pins_if #(1) devmode_if(devmode);
   tl_if tl_if(.clk(clk), .rst_n(rst_n));
   uart_if uart_if();