)]}'
{
  "commit": "54166313e66ce40f3ae8590b8d5750fb9f224fad",
  "tree": "0599852fafc39ffb7dc19e63ed7adb87f3201238",
  "parents": [
    "dc7350c975d3f51a4f7b09ecf04afb9f607b912e"
  ],
  "author": {
    "name": "Guillermo Maturana",
    "email": "maturana@google.com",
    "time": "Thu May 06 15:32:04 2021 -0700"
  },
  "committer": {
    "name": "cindychip",
    "email": "cindy.chen0316@gmail.com",
    "time": "Thu May 06 17:15:42 2021 -0700"
  },
  "message": "[dv/clkmgr] Fix peripheral clock checks\n\nThe new \"io\" peripheral clock causes the clk_enables CSR to shuffle\nsome bits.\nAdd assertions for new io peripheral clock.\nThe spi host 0 is clocked by clk_io_peri output of clkmgr.\n\nSigned-off-by: Guillermo Maturana \u003cmaturana@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a94d4961a3d5df1b8bb4c784a6a0aa3e72463496",
      "old_mode": 33188,
      "old_path": "hw/ip/clkmgr/dv/env/clkmgr_env_pkg.sv",
      "new_id": "7b6da06b64ae0f9511b13e5a4943198e755b8283",
      "new_mode": 33188,
      "new_path": "hw/ip/clkmgr/dv/env/clkmgr_env_pkg.sv"
    },
    {
      "type": "modify",
      "old_id": "3c86ce58c3ac765aca4a782ccc7c838b79e536b4",
      "old_mode": 33188,
      "old_path": "hw/ip/clkmgr/dv/env/clkmgr_if.sv",
      "new_id": "469217146b2eeab51388a6b9937deee27c0e439a",
      "new_mode": 33188,
      "new_path": "hw/ip/clkmgr/dv/env/clkmgr_if.sv"
    },
    {
      "type": "modify",
      "old_id": "31442871e7c39a4a4d047003832b4dc76f597e39",
      "old_mode": 33188,
      "old_path": "hw/top_earlgrey/formal/conn_csvs/top_earlgrey_conn.csv",
      "new_id": "ae63bc40ae1829f6e781eeed6e0af7d69dc3f47c",
      "new_mode": 33188,
      "new_path": "hw/top_earlgrey/formal/conn_csvs/top_earlgrey_conn.csv"
    }
  ]
}