diff --git a/hw/dv/doc/dv_doc_template.md b/hw/dv/doc/dv_doc_template.md
index e5ce44c..b60609d 100644
--- a/hw/dv/doc/dv_doc_template.md
+++ b/hw/dv/doc/dv_doc_template.md
@@ -22,7 +22,7 @@
 ## Current status
 * [Design & verification stage](../../README.md)
   * [HW development stages](../../../doc/project_governance/development_stages.md)
-* [Simulation results](https://reports.opentitan.org/hw/ip/foo/dv/latest/results.html)
+* [Simulation results](https://reports.opentitan.org/hw/ip/foo/dv/latest/report.html)
 
 ## Design features
 <!-- TODO: uncomment link to the spec below -->
diff --git a/hw/ip/i2c/dv/README.md b/hw/ip/i2c/dv/README.md
index 3a9dca1..a3093aa 100644
--- a/hw/ip/i2c/dv/README.md
+++ b/hw/ip/i2c/dv/README.md
@@ -10,7 +10,7 @@
 ## Current status
 * [Design & verification stage](../../../README.md)
   * [HW development stages](../../../../doc/project_governance/development_stages.md)
-* [Simulation results](https://reports.opentitan.org/hw/ip/i2c/dv/latest/results.html)
+* [Simulation results](https://reports.opentitan.org/hw/ip/i2c/dv/latest/report.html)
 
 ## Design features
 For detailed information on I2C design features, please see the
diff --git a/hw/ip/otbn/dv/README.md b/hw/ip/otbn/dv/README.md
index 11a1fdf..9ea58d9 100644
--- a/hw/ip/otbn/dv/README.md
+++ b/hw/ip/otbn/dv/README.md
@@ -11,7 +11,7 @@
 ## Current status
 * [Design & verification stage](../../../README.md)
   * [HW development stages](../../../../doc/project_governance/development_stages.md)
-* [Simulation results](https://reports.opentitan.org/hw/ip/otbn/dv/uvm/latest/results.html)
+* [Simulation results](https://reports.opentitan.org/hw/ip/otbn/dv/uvm/latest/report.html)
 
 ## Design features
 
diff --git a/hw/ip/sram_ctrl/dv/README.md b/hw/ip/sram_ctrl/dv/README.md
index 17702b7..580f338 100644
--- a/hw/ip/sram_ctrl/dv/README.md
+++ b/hw/ip/sram_ctrl/dv/README.md
@@ -9,8 +9,8 @@
 
 ## Pre-verified sub-modules
 The following sub-modules are pre-verified:
-* [prim_prince](https://reports.opentitan.org/hw/ip/prim/dv/prim_prince/latest/results.html)
-* [prim_lfsr](https://reports.opentitan.org/hw/ip/prim/dv/prim_lfsr/latest/results.html)
+* [prim_prince](https://reports.opentitan.org/hw/ip/prim/dv/prim_prince/latest/report.html)
+* [prim_lfsr](https://reports.opentitan.org/hw/ip/prim/dv/prim_lfsr/latest/report.html)
 
 Only toggle coverage on the IOs of these sub-modules is enabled for coverage collection.
 
diff --git a/hw/ip_templates/alert_handler/dv/README.md b/hw/ip_templates/alert_handler/dv/README.md
index b1f14cd..2016a09 100644
--- a/hw/ip_templates/alert_handler/dv/README.md
+++ b/hw/ip_templates/alert_handler/dv/README.md
@@ -13,7 +13,7 @@
 ## Current status
 * [Design & verification stage](../../../README.md)
   * [HW development stages](../../../../doc/project_governance/development_stages.md)
-* [Simulation results](https://reports.opentitan.org/hw/ip/alert_handler/dv/latest/results.html)
+* [Simulation results](https://reports.opentitan.org/hw/top_earlgrey/ip_autogen/alert_handler/dv/latest/report.html)
 
 ## Design features
 For detailed information on ALERT_HANDLER design features, please see the [ALERT_HANDLER HWIP technical specification](../README.md).
diff --git a/hw/top_earlgrey/dv/README.md b/hw/top_earlgrey/dv/README.md
index 58263b2..f93fee5 100644
--- a/hw/top_earlgrey/dv/README.md
+++ b/hw/top_earlgrey/dv/README.md
@@ -16,7 +16,7 @@
 ## Current status
 * [Design & verification stage](../../README.md)
   * [HW development stages](../../../doc/project_governance/development_stages.md)
-* [Simulation results](https://reports.opentitan.org/hw/top_earlgrey/dv/latest/results.html)
+* [Simulation results](https://reports.opentitan.org/hw/top_earlgrey/dv/latest/report.html)
 
 ## Design features
 For detailed information on `top_earlgrey` design features, please see the [Earl Grey Top Level Specification](../doc/specification.md).
diff --git a/hw/top_earlgrey/ip_autogen/alert_handler/dv/README.md b/hw/top_earlgrey/ip_autogen/alert_handler/dv/README.md
index b1f14cd..2016a09 100644
--- a/hw/top_earlgrey/ip_autogen/alert_handler/dv/README.md
+++ b/hw/top_earlgrey/ip_autogen/alert_handler/dv/README.md
@@ -13,7 +13,7 @@
 ## Current status
 * [Design & verification stage](../../../README.md)
   * [HW development stages](../../../../doc/project_governance/development_stages.md)
-* [Simulation results](https://reports.opentitan.org/hw/ip/alert_handler/dv/latest/results.html)
+* [Simulation results](https://reports.opentitan.org/hw/top_earlgrey/ip_autogen/alert_handler/dv/latest/report.html)
 
 ## Design features
 For detailed information on ALERT_HANDLER design features, please see the [ALERT_HANDLER HWIP technical specification](../README.md).
diff --git a/util/uvmdvgen/index.md.tpl b/util/uvmdvgen/index.md.tpl
index 42ea22f..c06fc24 100644
--- a/util/uvmdvgen/index.md.tpl
+++ b/util/uvmdvgen/index.md.tpl
@@ -21,7 +21,7 @@
 ${'##'} Current status
 * [Design & verification stage]({{< relref "hw" >}})
   * [HW development stages]({{< relref "doc/project/development_stages" >}})
-* [Simulation results](https://reports.opentitan.org/hw/ip/${name}/dv/latest/results.html)
+* [Simulation results](https://reports.opentitan.org/hw/ip/${name}/dv/latest/report.html)
 
 ${'##'} Design features
 For detailed information on ${name.upper()} design features, please see the [${name.upper()} HWIP technical specification]({{< relref "hw/ip/${name}/doc" >}}).