)]}'
{
  "commit": "4d6d1826ee1d73f561c1f0e31c26a7d7a345bec3",
  "tree": "dbf382c53ffe96385f5261009d23a95c7b3ec5c5",
  "parents": [
    "5cfb16c99c0fd4cac38d30b2cf007ee1a867ccf6"
  ],
  "author": {
    "name": "Raviteja Chatta",
    "email": "crteja@lowrisc.org",
    "time": "Thu Mar 09 17:21:09 2023 +0000"
  },
  "committer": {
    "name": "Cindy Chen",
    "email": "cindy.chen0316@gmail.com",
    "time": "Wed Mar 15 10:55:57 2023 -0700"
  },
  "message": "[hw,sysrst_ctrl] Add test to improve code coverage\n\nAdd test sequence to cover the following scenarios\n1. Trigger precondition Debounce to Idle state\n   \u003e deassert inputs before debounce time\n   \u003e disable precondition before debounce time\n2. Trigger combo detect Debounce to Idle state\n   \u003e deassert inputs before debounce time\n   \u003e disable detection before debounce time\n3. Assert ec_rst_l_i before combo action triggers ec_rst_l_o\n   and a valid combination of input transition is detected\n4. Key intrrrupt control Debounce to idle state transition\n   \u003e disable config before debounce time\n5. Auto block Debounce to Idle state transition\n   \u003e disable auto block before debounce time\n6. ULP debounce to Idle state transition\n   \u003e disable ULP feature before debounce time\n   \u003e deassert input signal before debounce time\n\nSigned-off-by: Raviteja Chatta \u003ccrteja@lowrisc.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
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      "old_path": "hw/ip/sysrst_ctrl/data/sysrst_ctrl_testplan.hjson",
      "new_id": "4863432abde057d28adc2b19d05edd8cf1fd64cb",
      "new_mode": 33188,
      "new_path": "hw/ip/sysrst_ctrl/data/sysrst_ctrl_testplan.hjson"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "b202dd71f69ab9de950ccf2295d519346bb5b3a6",
      "new_mode": 33188,
      "new_path": "hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_feature_disable_vseq.sv"
    },
    {
      "type": "modify",
      "old_id": "c8ee82df5bc84c8bfaca81c0c653c5ba858cbe9e",
      "old_mode": 33188,
      "old_path": "hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_vseq_list.sv",
      "new_id": "a07ab48fd5a80f22b36d3b3d224702c701113d4c",
      "new_mode": 33188,
      "new_path": "hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_vseq_list.sv"
    },
    {
      "type": "modify",
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      "old_path": "hw/ip/sysrst_ctrl/dv/env/sysrst_ctrl_env.core",
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      "new_mode": 33188,
      "new_path": "hw/ip/sysrst_ctrl/dv/env/sysrst_ctrl_env.core"
    },
    {
      "type": "modify",
      "old_id": "58a55c303344c430469c4139a4fed9b2f300b323",
      "old_mode": 33188,
      "old_path": "hw/ip/sysrst_ctrl/dv/sysrst_ctrl_sim_cfg.hjson",
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      "new_path": "hw/ip/sysrst_ctrl/dv/sysrst_ctrl_sim_cfg.hjson"
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}