diff --git a/hw/dv/sv/jtag_riscv_agent/jtag_riscv_monitor.sv b/hw/dv/sv/jtag_riscv_agent/jtag_riscv_monitor.sv
index 3981a20..a457aa9 100644
--- a/hw/dv/sv/jtag_riscv_agent/jtag_riscv_monitor.sv
+++ b/hw/dv/sv/jtag_riscv_agent/jtag_riscv_monitor.sv
@@ -37,7 +37,8 @@
         // Instruction register transaction
         if (item.ir == JtagDmiAccess) dmi_selected = 1;
         else dmi_selected = 0;
-      end else if (dmi_selected) begin
+      end else if (dmi_selected && cfg.is_rv_dm) begin
+        // (b/302151393) Run the checks when rv_dm is active
         // DR transaction and DMI selected by the instruction register.
         // Extract op from the transaction data register.
         op_raw = item.dr[DMI_OPW-1 : 0];