blob: 4907dc77685c2792744e9324ce0a8cd0e5eee44d [file] [log] [blame]
// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-tree *
// Only cover the TL interface of all sub-modules.
+node tb.dut.top_earlgrey.u_uart0 *tl_*
+node tb.dut.top_earlgrey.u_uart1 *tl_*
+node tb.dut.top_earlgrey.u_uart2 *tl_*
+node tb.dut.top_earlgrey.u_uart3 *tl_*
+node tb.dut.top_earlgrey.u_gpio *tl_*
+node tb.dut.top_earlgrey.u_spi_device *tl_*
+node tb.dut.top_earlgrey.u_spi_host0 *tl_*
+node tb.dut.top_earlgrey.u_spi_host1 *tl_*
+node tb.dut.top_earlgrey.u_i2c0 *tl_*
+node tb.dut.top_earlgrey.u_i2c1 *tl_*
+node tb.dut.top_earlgrey.u_i2c2 *tl_*
+node tb.dut.top_earlgrey.u_pattgen *tl_*
+node tb.dut.top_earlgrey.u_rv_timer *tl_*
+node tb.dut.top_earlgrey.u_usbdev *tl_*
+node tb.dut.top_earlgrey.u_otp_ctrl *tl_*
+node tb.dut.top_earlgrey.u_lc_ctrl *tl_*
+node tb.dut.top_earlgrey.u_alert_handler *tl_*
+node tb.dut.top_earlgrey.u_pwrmgr_aon *tl_*
+node tb.dut.top_earlgrey.u_rstmgr_aon *tl_*
+node tb.dut.top_earlgrey.u_clkmgr_aon *tl_*
+node tb.dut.top_earlgrey.u_sysrst_ctrl_aon *tl_*
+node tb.dut.top_earlgrey.u_adc_ctrl_aon *tl_*
+node tb.dut.top_earlgrey.u_pwm_aon *tl_*
+node tb.dut.top_earlgrey.u_pinmux_aon *tl_*
+node tb.dut.top_earlgrey.u_aon_timer_aon *tl_*
+node tb.dut.top_earlgrey.u_sensor_ctrl *tl_*
+node tb.dut.top_earlgrey.u_sram_ctrl_ret_aon *tl_*
+node tb.dut.top_earlgrey.u_flash_ctrl *tl_*
+node tb.dut.top_earlgrey.u_rv_dm *tl_*
+node tb.dut.top_earlgrey.u_rv_plic *tl_*
+node tb.dut.top_earlgrey.u_aes *tl_*
+node tb.dut.top_earlgrey.u_hmac *tl_*
+node tb.dut.top_earlgrey.u_kmac *tl_*
+node tb.dut.top_earlgrey.u_otbn *tl_*
+node tb.dut.top_earlgrey.u_keymgr *tl_*
+node tb.dut.top_earlgrey.u_csrng *tl_*
+node tb.dut.top_earlgrey.u_entropy_src *tl_*
+node tb.dut.top_earlgrey.u_edn0 *tl_*
+node tb.dut.top_earlgrey.u_edn1 *tl_*
+node tb.dut.top_earlgrey.u_sram_ctrl_main *tl_*
+node tb.dut.top_earlgrey.u_rom_ctrl *tl_*
+node tb.dut.top_earlgrey.u_rv_core_ibex *tl_*
+node tb.dut.top_earlgrey.u_xbar_main *tl_*
+node tb.dut.top_earlgrey.u_xbar_peri *tl_*
+node tb.dut.top_earlgrey *tl_*
+node tb.dut.u_ast *tl_*
// Only cover the `u_reg` instance of un-pre-verified modules.
begin line+cond+fsm+branch+assert
+tree tb.dut.top_earlgrey.u_pinmux_aon.u_reg
+tree tb.dut.top_earlgrey.u_rv_plic.u_reg
+tree tb.dut.top_earlgrey.u_sensor_ctrl.u_reg
+tree tb.dut.top_earlgrey.u_rv_core_ibex.u_reg_cfg
-module prim_cdc_rand_delay // DV construct.
-moduletree prim_onehot_check // FPV verified
-moduletree prim_secded_inv_64_57_dec // FPV verified
-moduletree prim_secded_inv_39_32_dec // FPV verified
end