hw/top_earlgrey/dv/cov/chip_cover.cfg

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

-tree *

// Include port toggles of all IOs at these hierarchies.
begin tgl(portsonly)
  +module chip_earlgrey_asic
  +module ast
  +module padring
  +module rv_core_ibex
  +moduletree top_earlgrey 2

  // [LOW_RISK] These are covered in FPV. These are partly covered by some tests in DV as well, but
  // it is not feasible to get a full 100% coverage on all of the bits. The rationale for this
  // exclusion is documented in more detail in the issue lowrisc/opentitan#15427.
  -node tb.dut.top_earlgrey.u_rv_core_ibex.u_core crash_dump_o.*
  -node tb.dut.top_earlgrey.u_rv_core_ibex crash_dump_o.*
  -node tb.dut.top_earlgrey.u_rstmgr_aon cpu_dump_i.*
  -node tb.dut.top_earlgrey.u_alert_handler crashdump_o.*
  -node tb.dut.top_earlgrey.u_rstmgr_aon alert_dump_i.*

  // [UNR] The pass through port on SPI_HOST1 is tied off / unused.
  -node tb.dut.top_earlgrey.u_spi_host1 passthrough_i.*
  -node tb.dut.top_earlgrey.u_spi_host1 passthrough_o.*
end

// Include all coverage metrics in non-preverified modules.
begin line+cond+fsm+branch+assert
  +module chip_earlgrey_asic
  +tree tb.dut.u_prim_usb_diff_rx

  +module top_earlgrey
  +tree tb.dut.top_earlgrey.u_dft_tap_breakout

  +moduletree padring
  +moduletree pinmux
  +moduletree rv_core_ibex
  +moduletree rv_plic
  +moduletree sensor_ctrl

  // The modules below are preverified in FPV and / or DV testbenches.
  -moduletree ibex_top
  -moduletree prim_alert_sender
  -moduletree prim_alert_receiver
  -moduletree prim_count
  -moduletree prim_esc_sender
  -moduletree prim_esc_receiver
  -moduletree prim_lfsr
  -moduletree prim_onehot_check
  -moduletree prim_prince
  -moduletree prim_secded_inv_64_57_dec
  -moduletree prim_secded_inv_39_32_dec

  -moduletree prim_cdc_rand_delay  // DV construct.

  // [LOWRISK] This module generates a warl_mask output signal under different parameterizations.
  // The unselected parameterization(s) show up as uncovered. Incorrectly formed warl_mask will
  // cause the chip_pinmux_pad_attr test to fail, so it can be safely excluded.
  -moduletree prim_generic_pad_attr
end

// TODO: Re-enable tgl(portsonly) on the the excluded pre-verified sub-modules above in
// non-preverified parents.
begin tgl(portsonly)
  +tree tb.dut.top_earlgrey.u_pinmux_aon.gen_alert_tx[0].u_prim_alert_sender 1
  +tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[0].u_alert_sender 1
  +tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[1].u_alert_sender 1
  +tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[2].u_alert_sender 1
  +tree tb.dut.top_earlgrey.u_rv_core_ibex.gen_alert_senders[3].u_alert_sender 1
  +tree tb.dut.top_earlgrey.u_rv_core_ibex.u_core 1
  +tree tb.dut.top_earlgrey.u_rv_core_ibex.u_prim_esc_receiver 1
  +tree tb.dut.top_earlgrey.u_rv_plic.gen_alert_tx[0].u_prim_alert_sender 1
  +tree tb.dut.top_earlgrey.u_sensor_ctrl.u_prim_fatal_alert_sender 1
  +tree tb.dut.top_earlgrey.u_sensor_ctrl.u_prim_recov_alert_sender 1
end