| commit | 998affccd4502734d9f101bccc0291d01b01726f | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Mon Aug 17 17:28:19 2020 +0100 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Wed Aug 26 14:59:49 2020 +0100 |
| tree | a06b803d2d1fc9afe8929cdff0c695117b916b9c | |
| parent | 36fe3b5381942a57eb08af42be8e7233d79fda57 [diff] |
[otbn] Properly generate multi-section output in otbn-rig
The code was trying to use the .offset assembler directive to tell it
where to put things, but this turns out not to work at all. So we now
generate a linker script as well as the assembly code.
The command line is pretty horrible, but will be tidied up
soon (splitting up "generate me some snippets" and "turn them into
assembly"). For now, you can run it as
./hw/ip/otbn/util/otbn-rig \
--asm-output gen.S \
--ld-output gen.ld \
-o gen.json
The resulting gen.S looks something like this:
/* Section 0 (addresses [0x0000..0x0007]) */
.section .text.sec0000
addi x30, x0, 1269
jal x6, 3320
/* Section 1 (addresses [0x02d4..0x0333]) */
.section .text.sec0001
lui x29, 29447
srl x18, x30, x30
slli x17, x24, 5
ori x16, x17, -1155
or x3, x16, x29
sub x25, x18, x29
or x6, x6, x0
lui x21, 273100
and x25, x24, x24
...
and gen.ld looks something like this:
SECTIONS
{
/* Section 0 (addresses [0x0000..0x0007]) */
.text.sec0000 0x0 : AT(0x100000)
{
*(.text.sec0000)
}
/* Section 1 (addresses [0x02d4..0x0333]) */
.text.sec0001 0x2d4 : AT(0x1002d4)
{
*(.text.sec0001)
}
...
Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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