diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey.h b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
index 31b90e9..1dbe6ea 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey.h
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
@@ -854,22 +854,22 @@
 #define TOP_EARLGREY_ROM_CTRL_ROM_SIZE_BYTES 0x4000u
 
 /**
- * Peripheral base address for reg device on rv_core_ibex in top earlgrey.
+ * Peripheral base address for cfg device on rv_core_ibex in top earlgrey.
  *
  * This should be used with #mmio_region_from_addr to access the memory-mapped
  * registers associated with the peripheral (usually via a DIF).
  */
-#define TOP_EARLGREY_RV_CORE_IBEX_REG_BASE_ADDR 0x411F0000u
+#define TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR 0x411F0000u
 
 /**
- * Peripheral size for reg device on rv_core_ibex in top earlgrey.
+ * Peripheral size for cfg device on rv_core_ibex in top earlgrey.
  *
  * This is the size (in bytes) of the peripheral's reserved memory area. All
  * memory-mapped registers associated with this peripheral should have an
- * address between #TOP_EARLGREY_RV_CORE_IBEX_REG_BASE_ADDR and
- * `TOP_EARLGREY_RV_CORE_IBEX_REG_BASE_ADDR + TOP_EARLGREY_RV_CORE_IBEX_REG_SIZE_BYTES`.
+ * address between #TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR and
+ * `TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR + TOP_EARLGREY_RV_CORE_IBEX_CFG_SIZE_BYTES`.
  */
-#define TOP_EARLGREY_RV_CORE_IBEX_REG_SIZE_BYTES 0x1000u
+#define TOP_EARLGREY_RV_CORE_IBEX_CFG_SIZE_BYTES 0x1000u
 
 
 /**
diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h b/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h
index 212dfd6..1c71811 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h
@@ -386,12 +386,12 @@
  */
 #define TOP_EARLGREY_ROM_CTRL_ROM_BASE_ADDR 0x8000
 /**
- * Peripheral base address for reg device on rv_core_ibex in top earlgrey.
+ * Peripheral base address for cfg device on rv_core_ibex in top earlgrey.
  *
  * This should be used with #mmio_region_from_addr to access the memory-mapped
  * registers associated with the peripheral (usually via a DIF).
  */
-#define TOP_EARLGREY_RV_CORE_IBEX_REG_BASE_ADDR 0x411F0000
+#define TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR 0x411F0000
 #endif  // __ASSEMBLER__
 
 #endif  // OPENTITAN_HW_TOP_EARLGREY_SW_AUTOGEN_TOP_EARLGREY_MEMORY_H_