tree 2a8822ea44379634240b36d971e9129e8d737c84
parent 4b92bbdc8aa8dacc2789d8416032166e1453c46a
author Dan McArdle <dmcardle@google.com> 1668026600 -0500
committer Drew Macrae <drewmacrae@gmail.com> 1668180882 -0500

[fpga] Add SRST delay option to OpenOCD args

This commit increases the SRST delay from the default of zero to 10 ms.
Now, OpenOCD will wait after deasserting SRST before it issues JTAG
commands. This is necessary to give the chip time to boot, since the
SRST signal is interpreted as POR.

The additional SRST delay eliminates these warnings from the log:

    [OPENOCD] Error: JTAG scan chain interrogation failed: all ones
    [OPENOCD] Error: Check JTAG interface, timings, target power, etc.

This commit also disables adaptive clock speed (RCLK) because we do not
support that feature. I don't have a great justification for the value
of 200 KHz, but it's less than the ARM-USB-TINY-H's max of 500 KHz and
it appears to work.

Signed-off-by: Dan McArdle <dmcardle@google.com>