)]}'
{
  "commit": "1af40089309e4c3cb78dd04b2038b2fe07233ab6",
  "tree": "e257df748ea7b302829b38f586aa727062eaadf4",
  "parents": [
    "f78446f157964e6e58e5e3292e8d16d81f26f507"
  ],
  "author": {
    "name": "Alphan Ulusoy",
    "email": "alphan@google.com",
    "time": "Wed May 25 14:36:24 2022 -0400"
  },
  "committer": {
    "name": "Alphan Ulusoy",
    "email": "alphan@google.com",
    "time": "Wed May 25 19:29:19 2022 -0400"
  },
  "message": "[opentitanlib] Add support for configuring CW310\u0027s PLL chip\n\nThis commit adds support for configuring CW310\u0027s PLL chip CDCE906. While\nnot thoroughly documented, this is basically a re-implementation of some\nof the methods here: `chipwhisperer/hardware/naeusb/pll_cdce906.py`.\n\nSigned-off-by: Alphan Ulusoy \u003calphan@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b5ca46fb1b74a9db826f20eb0b4f3cd70edcbbf9",
      "old_mode": 33188,
      "old_path": "sw/host/opentitanlib/src/transport/cw310/usb.rs",
      "new_id": "c31df12e7bc461191ec3d9d2fde72b88e9280325",
      "new_mode": 33188,
      "new_path": "sw/host/opentitanlib/src/transport/cw310/usb.rs"
    },
    {
      "type": "modify",
      "old_id": "a9c75c4fc2bfb948559ee91022f0f9311fa0e0c1",
      "old_mode": 33188,
      "old_path": "sw/host/opentitanlib/src/transport/errors.rs",
      "new_id": "ba6422bf87fc60c4c53decdffd736acac84f3f73",
      "new_mode": 33188,
      "new_path": "sw/host/opentitanlib/src/transport/errors.rs"
    }
  ]
}