blob: bdc085d6fbf08aabcb1f9a73a735e48e4f1b32a8 [file] [log] [blame]
CAPI=2:
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:dv:i2c_env:0.1"
description: "I2C DV UVM environment"
filesets:
files_dv:
depend:
- lowrisc:dv:ralgen
- lowrisc:dv:cip_lib
- lowrisc:dv:i2c_agent
- lowrisc:ip:i2c
files:
- i2c_env_pkg.sv
- i2c_dv_if.sv
- i2c_seq_cfg.sv: {is_include_file: true}
- i2c_env_cfg.sv: {is_include_file: true}
- i2c_env_cov.sv: {is_include_file: true}
- i2c_env.sv: {is_include_file: true}
- i2c_virtual_sequencer.sv: {is_include_file: true}
- i2c_scoreboard.sv: {is_include_file: true}
- seq_lib/i2c_vseq_list.sv: {is_include_file: true}
- seq_lib/i2c_base_vseq.sv: {is_include_file: true}
- seq_lib/i2c_common_vseq.sv: {is_include_file: true}
- seq_lib/i2c_rx_tx_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_smoke_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_override_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_rx_oversample_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_fifo_threshold_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_fifo_overflow_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_fifo_reset_fmt_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_fifo_fmt_empty_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_fifo_reset_rx_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_timeout_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_fifo_full_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_perf_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_stretch_timeout_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_error_intr_vseq.sv: {is_include_file: true}
- seq_lib/i2c_host_stress_all_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_smoke_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_perf_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_runtime_base_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_stress_wr_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_stress_rd_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_stretch_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_tx_ovf_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_timeout_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_ack_stop_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_fifo_reset_acq_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_fifo_reset_tx_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_stress_all_vseq.sv: {is_include_file: true}
- seq_lib/i2c_target_hrst_vseq.sv: {is_include_file: true}
file_type: systemVerilogSource
generate:
ral:
generator: ralgen
parameters:
name: i2c
ip_hjson: ../../data/i2c.hjson
targets:
default:
filesets:
- files_dv
generate:
- ral