tree 2869a3c927e0a2e693c4d4c7e473686999fe978f
parent 025d35df64e5bffbda8d99e2d3d9d10f872f7080
author Sam Elliott <selliott@lowrisc.org> 1587560749 +0100
committer Philipp Wagner <mail@philipp-wagner.com> 1587576698 +0100

[topgen] Add Module Name When Prefixing Signals

This commit adds the module name into the signal information when
generating top_earlgrey.gen.hjson. This makes it much easier to, for
example, map a PLIC interrupt signal back to the module it
corresponds to, without having to split the signal name again.

Signed-off-by: Sam Elliott <selliott@lowrisc.org>