tree 1cd2518c7cc67fe9373a76270fe6d29a70563820
parent a6ff6da8a02f1b7498682fdbac92d8395c8a5336
author Robert Norton-Wright <robert.norton@scisemi.com> 1737369787 +0000
committer Robert Norton <1412774+rmn30@users.noreply.github.com> 1737643755 +0000

Add hyperram support on Sonata v1.

We place all the rw data in SRAM and (almost) all code and RO data in HyperRAM.
This requires changing the linker script to support linking code either at lower (on most current boards) or higher address (Sonata v1).

Co-authored-by: Nathaniel Wesley Filardo <wes.filardo@scisemi.com>